MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N5, N3E, N3P)
12-Bit Low power successive-approximation ADC
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Block Diagram of the 12-Bit Low power successive-approximation ADC IP Core

12-Bit Successive Approximation ADC IP
- This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
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