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40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
The TRV401TSM40LP IP is a 1.1V low-power low-silicon-area AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Fractional-N Clock-PLL. It is implemented in TSMC Low-Power 40nm CMOS process technology and is especially suitable for use within wireless communication and broadcast integrated circuit RFIC or BBIC subsystems (LTE, WiFi, WiMAX, DAB, DAB+, FM, HDFM, DRM, etc).
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Block Diagram of the 40nm 1.1V AFE comprising 12-bit IQ ADC, 12-bit IQ DAC and Clock-PLL
Clock PLL ADC DAC AFE 40nm Low Power Low Area IP
- Analog Front End: 4 channels of 12-bit 2 GSPS ADC IQ Pairs, 4 channels of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL
- Analog Front End: 1 channel of 12-bit 2 GSPS ADC IQ Pairs, 1 channel of 12-bit 2 GSPS DAC IQ Pairs, PVT & Integrated PLL
- 40nm 1.1V 16MHz-2GHz Fractional-N Clock-PLL
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