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NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
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Adaptive Body Bias Generator
The adaptive body bias generator (ABBG) consists of a positive-BBG and a negative-BBG for FDSOI-MOS transistors. The ABBG is used for either Reverse Body Biasing (RBB) to reduce leakage current of the logic devices or Forward Body Biasing (FBB) to improve the system performance by adjusting the body voltages of transistors.
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Block Diagram of the Adaptive Body Bias Generator IP Core
