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Aeonic Generate Digital PLL for multi-instance, core logic clocking
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ASI Transmitter
The MVD ASI Transmitter core is a drop-in module that includes the following functions :
• 188 or 204 bytes MPEG-TS input
• 8B/10B Coding
• Sync Byte (FC Comma) Insertion
• Parallel/Serial Conversion
• Output signal polarity: normal or inverted
• 188 or 204 bytes MPEG-TS input
• 8B/10B Coding
• Sync Byte (FC Comma) Insertion
• Parallel/Serial Conversion
• Output signal polarity: normal or inverted
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- see the entire ASI Transmitter datasheet
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Block Diagram of the ASI Transmitter IP Core
