Aeonic Generate Digital PLL for multi-instance, core logic clocking
Bluetooth Dual Mode v5.3 Baseband Controller IP
Compatible with the standard Bluetooth HCI, it can be used with any Bluetooth dual mode 5.3 host software protocol stack and profiles, either split around the HCI so that the lower layers and upper layers can run on different processors or systems, or combined together to run on the same processor to make a fully hosted solution.
The feature set for supporting headset solution (including TWS) has been prioritized.
• Will support 2 connections
Power Considerations
• The IP will provide the hooks to ensure power save mechanisms in the SoC
• Power gating, clock gating and maintaining a low power domain during sleep are basic hooks
• Protocol based features like adaptive window widening and slave latency will be supported.
• The IP has always been architected to minimize the uptime of RF
View Bluetooth Dual Mode v5.3 Baseband Controller IP full description to...
- see the entire Bluetooth Dual Mode v5.3 Baseband Controller IP datasheet
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Block Diagram of the Bluetooth Dual Mode v5.3 Baseband Controller IP
BTDM LINK LAYER IP
- Bluetooth low energy v6.0 Baseband Controller, Protocol Software Stack and Profiles IP
- Bluetooth low energy v5.4 Baseband Controller, Protocol Software Stack and Profiles IP
- Bluetooth LE v5.3 / Zigbee 3 RF/PHY for Global Foundry 55nm (Silicon proven IP)
- BLE v5.0 RF PHY KGD & IP
- Bluetooth low energy v5.3 Software based Linklayer IP
- BLE v5.4 RF IP in TSMC22 ULP