The 3GPP LTE FEC Encoder IP Core addresses the implementation of the FEC building blocks compliant to 3GPP TS 36.212 V 10.5.0. Specifically, the IP core offers an efficient, easy to customize and reliable implementation of the following blocks. Optimization techniques have been used to achieve a reduced cycle count in the design of key building blocks thus making it amenable to parallel implementation for increased data rate requirements of the order of few gigabits as demanded by futuristic implementations.