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Coordinate Rotation Digital Computer (CORDIC) engi
CoreCORDIC is an Microsemi FPGA-optimized Coordinate Rotation Digital Computer (CORDIC) engine. The CORDIC algorithm by J. Volder provides an iterative method of performing vector rotations using only shifts and adds. CoreCORDIC produces a CORDIC engine optimized for Microsemi FPGAs. The core implements the CORDIC method for calculating the trigonometric functions of sine, cosine, magnitude, and phase. Depending on the configuration defined by the user, the resulting module implements pipelined parallel, word-serial, or bit-serial architecture in one of the two major modes: rotation or vectoring. In rotation mode, CoreCORDIC rotates a vector by a specified angle. This mode is used to convert polar coordinates to the Cartesian coordinates, for general vector rotation, and also to calculate sine and cosine functions.
In vectoring mode, CoreCORDIC rotates the input vector towards the x axis while accumulating a rotation angle. Vectoring mode is used to convert the Cartesian vector coordinates to polar coordinates, thus calculating the magnitude and phase of the input vector.
CoreCORDIC can be implemented in a bit-serial architecture that utilizes only 3% of an AFS600 and can operate at up to 88 MHz performing a transform in 6.5 µsec. If faster transforms are required, the core can be implemented in word-serial or parallel architecture, thereby utilizing more of the device, but reducing transform time to as low as 21.7 nsec.
Key Features:
* Vector rotation — conversion of polar coordinates to rectangular coordinates
* Vector translation — conversion of rectangular coordinates to polar coordinates
* Sine and cosine calculation
* 8-bit to 48-bit configurable word size
* 8 to 48 configurable number of iterations
* Parallel pipelined architecture for the fastest calculation
* Bit-serial architecture for the smallest area
CoreCORDIC is supported widely in Microsemi FPGA devices. For detailed information on device support and utilization, see the CoreCORDIC handbook and release notes.
CoreCORDIC is available for FREE in Microsemi Libero® Integrated Design Environment (IDE) and is fully compatible with SmartDesign.
In vectoring mode, CoreCORDIC rotates the input vector towards the x axis while accumulating a rotation angle. Vectoring mode is used to convert the Cartesian vector coordinates to polar coordinates, thus calculating the magnitude and phase of the input vector.
CoreCORDIC can be implemented in a bit-serial architecture that utilizes only 3% of an AFS600 and can operate at up to 88 MHz performing a transform in 6.5 µsec. If faster transforms are required, the core can be implemented in word-serial or parallel architecture, thereby utilizing more of the device, but reducing transform time to as low as 21.7 nsec.
Key Features:
* Vector rotation — conversion of polar coordinates to rectangular coordinates
* Vector translation — conversion of rectangular coordinates to polar coordinates
* Sine and cosine calculation
* 8-bit to 48-bit configurable word size
* 8 to 48 configurable number of iterations
* Parallel pipelined architecture for the fastest calculation
* Bit-serial architecture for the smallest area
CoreCORDIC is supported widely in Microsemi FPGA devices. For detailed information on device support and utilization, see the CoreCORDIC handbook and release notes.
CoreCORDIC is available for FREE in Microsemi Libero® Integrated Design Environment (IDE) and is fully compatible with SmartDesign.
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