Aeonic Generate Digital PLL for multi-instance, core logic clocking
Crystal oscillator 10-30Mhz with digital frequency adjustment ± 100ppm
Oscillation frequency can be digitally adjusted ( +/- 100ppm)
In power-down mode, the oscillator is bypassed. An external clock signal can be applied to “xin” pin.
Internal current reference generator allows the cell to be used as a stand-alone.
If a more accurate current reference is desired, for better control or extended range of oscillation frequency over PVT corners, the user can apply an external current reference. (25uA typical).
A such reference current can be provided by V-Trans Irefgen (resistor-less design +/-5%) or Refgen (with external reference resistor +/- 1%) libraries or any other third party IP.
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