Aeonic Generate Digital PLL for multi-instance, core logic clocking
DC/DC Buck Regulator
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Block Diagram of the DC/DC Buck Regulator IP Core
DCDC IP
- Nano power DC-DC converter in SMIC 40EF with ultra-low quiescent current and high efficiency at light load
- Nano power DC-DC converter in TSMC 22ULL with ultra-low quiescent current and high efficiency at light load
- Nano power DC-DC converter in TSMC 40uLP with ultra-low quiescent current and high efficiency at light load
- TSMC 40nm LP combo voltage regulator combining a high efficiency DC-DC for operation in normal mode and an ultra-low quiescent uLDO to supply AON domain during sleep mode
- High efficiency and Low BoM DC-DC designed in GobalFoundries 22FDX
- GF 22FDX combo voltage regulator combining a high efficiency DC-DC for operation in normal mode and an ultra-low quiescent uLDO to supply AON domain during sleep mode