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Display Interface Multiplexer
The latest trend in portable computer power management is Switchable Graphics. This technology allows a discrete graphics card to be used for graphics intensive applications when under AC power (plugged in to power socket) and Intel Integrated Graphics to be used in battery mode, extending battery life when on-the-go.
The Display Interface (7:1 LVDS) Multiplexer IP enables Switchable Graphics applications. Using this IP you can select one of two asynchronous LVDS video streams (OpenLDI or FPD-link or DFP) for output by first converting them to parallel, multiplexing and reconverting to serial. The IP consists of two LVDS to parallel data converters, one parallel data multiplexer and a parallel data to LVDS converter. The multiplexing is initiated by a user input signal, but the switching instance is determined by the IP core by processing the sync signals in the video stream.
The Display Interface Multiplexer is available as an IPexpress user configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased.
The Display Interface (7:1 LVDS) Multiplexer IP enables Switchable Graphics applications. Using this IP you can select one of two asynchronous LVDS video streams (OpenLDI or FPD-link or DFP) for output by first converting them to parallel, multiplexing and reconverting to serial. The IP consists of two LVDS to parallel data converters, one parallel data multiplexer and a parallel data to LVDS converter. The multiplexing is initiated by a user input signal, but the switching instance is determined by the IP core by processing the sync signals in the video stream.
The Display Interface Multiplexer is available as an IPexpress user configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased.
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Block Diagram of the Display Interface Multiplexer IP Core
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