English
You are here:
DP1.1 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. It is composed of physical layer and PHY logic.
The physical layer contains 4 data channels, an AUX channel and bias circuit.
The 4 data channels serve as the main link to receive video and audio stream with a data rate up to 2.7Gbps. Each data channel consists of termination, equalizer and CDR circuit.
The AUX channel employs half-duplex, bidirectional link to transmit and receive auxiliary information, such as EDID information and link status between a transmitter and a receiver device.
The bias circuit generates voltage and current reference.
The PHY logic receives the recovered parallel data and clocks signals of 4 data channels.
Innosilicon DP RX IP offers reliable implementation for DP or eDP interface, which can be integrated in the SOC used in multimedia device.
The physical layer contains 4 data channels, an AUX channel and bias circuit.
The 4 data channels serve as the main link to receive video and audio stream with a data rate up to 2.7Gbps. Each data channel consists of termination, equalizer and CDR circuit.
The AUX channel employs half-duplex, bidirectional link to transmit and receive auxiliary information, such as EDID information and link status between a transmitter and a receiver device.
The bias circuit generates voltage and current reference.
The PHY logic receives the recovered parallel data and clocks signals of 4 data channels.
Innosilicon DP RX IP offers reliable implementation for DP or eDP interface, which can be integrated in the SOC used in multimedia device.
View DP1.1 RX PHY full description to...
- see the entire DP1.1 RX PHY datasheet
- get in contact with DP1.1 RX PHY Supplier