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E20 Smallest, most efficient RISC V Ccore
The SiFive E20 Standard Core is an extremely efficient implementation of the E2 Series configured for very low area and power. The E20 brings the power of the RISC-V software ecosystem to efficiently address traditional 8-bit and 32-bit microcontroller applications such as IoT, Analog Mixed Signal, and Programmable Finite State Machines.
Further optimize the E2 Core for the smallest area using SiFive Core Designer.
Further optimize the E2 Core for the smallest area using SiFive Core Designer.
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Block Diagram of the E20 Smallest, most efficient RISC V Ccore
