FEC RS (254,250) Decoder IP

FEC RS (254,250) Decoder core is compliant with standard VESA DisplayPort version 1.4/2.0. Through its compatibility, it provides a simple interface to a wide range of low-cost devices. FEC RS (254,250) Decoder IIP is proven in FPGA environment. The host interface of the FEC RS (254,250) Decoder can be simple interface or can be AHB, AHB-Lite, APB, AXI, AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom buses.

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