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General-Purpose I/O Controller Core
The GPIO core is used to create functions in a system that are not implemented with dedicated controllers, and require simple input and/or output software-controlled signals.
The number of general-purpose I/O signals is user selectable ranging from 1 to 32. For more I/O signals, several GPIO cores can be used in parallel. Each GPIO signal can be programmed individually as an input, an input in interrupt mode, an output, a bi-directional I/O, or as driven by an auxiliary input. GPIO signals programmed as inputs can be registered at the rising edge of the system clock or at a user-programmed edge of the external clock.
The GPIO core is rigorously verified, silicon-proven and available in RTL source or as a targeted FPGA netlist.
The number of general-purpose I/O signals is user selectable ranging from 1 to 32. For more I/O signals, several GPIO cores can be used in parallel. Each GPIO signal can be programmed individually as an input, an input in interrupt mode, an output, a bi-directional I/O, or as driven by an auxiliary input. GPIO signals programmed as inputs can be registered at the rising edge of the system clock or at a user-programmed edge of the external clock.
The GPIO core is rigorously verified, silicon-proven and available in RTL source or as a targeted FPGA netlist.
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Block Diagram of the General-Purpose I/O Controller Core IP Core
