H.264 Encoder FPGA Core

Our FPGA core is highly optimized and 80% SMALLER AND FASTER THAN THE COMPETITION WITH ⟨ 1ms LATENCY @ 1080p30!


It is capable of being synthesized in many FPGAs and supports H.264 variable and fixed bit-rate encoding of video streams. Encodes video data at 1.5 clocks/pixel. Typical clock rate in an Xilinx SPARTAN 6 is 95Mhz. Typical clock rate in a Xilinx Zynq 7020 is 95MHz. Multiple cores can be used for processing larger size or higher frame rate images. Uses FPGA specific DDR 3 controller and microprocessor soft core. In addition, the standard core can be customized, retaining ITAR compliance, to meet unique functional needs.

• see the entire H.264 Encoder FPGA Core datasheet
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