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Hardware RTP Stack for H.264 Stream Encapsulation
The Hardware RTP Stack Implements a Real Time Transport Protocol (RTP) hardware stack that encapsulates H.264/NAL streams to RTP packets that are compliant with RFC 3894 and RFC 6184.
The Hardware RTP Stack can be directly connected to the output of an H.264 encoder to output RTP packets, which can subsequently be forwarded for UDP/IP or TCP/IP encapsulation. The hardware stack produces complete RTP packets, without the need for any host-processor assistance. Along with CAST’s UDP/IP hardware stack, the H2642RTP core is ideal for offloading the demanding task of RTP/UDP/IP encapsulation from a host processor, and enables H.264 video streaming even in processor-less SoC designs.
The Hardware RTP Stack for H.264 is easy to integrate in systems with or without a host processor. H.264 stream and RTP packet data can are input/output via dedicated streaming-capable interfaces, enabling direct connection to hardware video encoders and hardware stacks for UDP or TCP. Status and control registers are accessible by an AXI4-Lite interface.
The Hardware RTP Stack for H.264 is available in RTL source or as a targeted FPGA netlist. Platforms integrating the core along H.264 encoder, UDP/IP, and eMAC cores, are also available from CAST, and can enable rapid development of video over IP systems.
The Hardware RTP Stack can be directly connected to the output of an H.264 encoder to output RTP packets, which can subsequently be forwarded for UDP/IP or TCP/IP encapsulation. The hardware stack produces complete RTP packets, without the need for any host-processor assistance. Along with CAST’s UDP/IP hardware stack, the H2642RTP core is ideal for offloading the demanding task of RTP/UDP/IP encapsulation from a host processor, and enables H.264 video streaming even in processor-less SoC designs.
The Hardware RTP Stack for H.264 is easy to integrate in systems with or without a host processor. H.264 stream and RTP packet data can are input/output via dedicated streaming-capable interfaces, enabling direct connection to hardware video encoders and hardware stacks for UDP or TCP. Status and control registers are accessible by an AXI4-Lite interface.
The Hardware RTP Stack for H.264 is available in RTL source or as a targeted FPGA netlist. Platforms integrating the core along H.264 encoder, UDP/IP, and eMAC cores, are also available from CAST, and can enable rapid development of video over IP systems.
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Block Diagram of the Hardware RTP Stack for H.264 Stream Encapsulation
