I2S Controller IP Core- Two Channel
The controller’s I2S interface consists of one transmitter and one receiver. Each channel can be programmed as an I2S master or an I2S slave. The Bit Clock (BLCK) and Left and Right Clock (LRCK) provide synchronization for the transmit and receive data. The I2S Controller IP supports 44.1KHz audio sampling rates. DAC/ADC resolution is configurable from 8-bit to 32-bit.
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