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Aeonic Generate Digital PLL for multi-instance, core logic clocking
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IBM 65nm 3.3v-1.0v Power Regulator
This IP is a 3.3V to 1.0V power regulator in IBM 65nm 1.0V/2.5V process. It supports a large Vdd range (1.62V~3.6V) and a large output capacitance range (minimal 0.1uF). The max rated output current is 100mA, and the current limit is about 350mA.
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Power Regulator in IBM 65nm IP
- Low Jitter PLL with Accurately Spaced 16-Phase Output Clocks
- SMIC 65nm LL 3.3V-2.5/1.2V Power Regulator
- IBM 65nm LPE 3.3V/1.2V Power On Reset
- IBM 65nm SF 3.3V Power on Reset
- IBM 65nm SF 3.3V/1.0V Power on Reset
- DC-DC Buck Ultra Fast Response High Power Series ( Vin = 2.3-4.6V; Vo = 1.5-2.0V; Io = 150mA ) - TSMC 65nm