Image Stabilization IP Core

The S-COR-10 FPGA IP core for image stabilization in video stream images is designed for use in vision systems intended for various applications (security systems, specialized systems, etc.) that are based on FPGA. The core is a completed module suitable for use in FPGA projects. The core represents a simple data exchange interface that ensures easy integration into various systems. The core performs 2D (horizontal and vertical) image stabilization. The algorithms implemented in the core provide image stabilization with accuracy of 2 pixels. The core determines the offset of the image relative to the previous frame and adapted to the smooth movement of the field of view of the video source. The core doesn’t modify the input image, the core forwards horizontal and vertical offset values to other subsystems. Subsequently this information can be used to read image data from the corresponding addresses (with offset). Thus, the S-COR-10 IP core is a versatile module that allows its use in any FPGA projects for vision systems.

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