TC1000 implements the turbo code specified by DVB-RCS for Interactive 2-way satellite systems. This turbo code used offers a very high flexibility in terms of block size and code rate combinations, enabling efficient multi-user systems and low latencies. TurboConcept's TC1000 encoder/decoder Cores gives optimal throughput versus FPGA resource usage trade-offs. The typical DVB-RCS usage is in the hub (base-station), where a single high-throughput decoder Core can be shared by many users and frequency bands. Implemented in low-cost FPGA devices or in an ASIC, the Core is also an efficient solution at terminal side. TC1000 is the industry reference and equips today most of the RCS or RCS-like systems.