ITU G.704 T1 Framer/Deframer
The ntT1_G704 IP core provides a flexible interface supporting hardware and microprocessor modes. Specifically the core can be connected to a host system either through an 8-bit parallel microprocessor interface (HP mode) or through a set of I/O ports (HW mode). When in HP mode, the microprocessor configures and monitors the functionality of the core through a rich set of registers. When in HW mode, the core is directly controlled and monitored through a set of dedicated ports and no microprocessor control is necessary.
At the transmit side, the framer generates framing patterns, CRC6 bits, formats outgoing and signalling data, generates alarms and clock outputs for data conditioning and decoding. At the receive side, the deframer establishes frame / multiframe synchronization, extracts data, signalling and alarm flags. It provides information like frame, multiframe alignment, calculates CRC6 and counts CRC6 errors.
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