The OT4001_cjtag is an adapter which permits legacy IEEE 1149.1 ports to communicate as an IEEE 1149.7 2-wire OScan1 cJTAG port. A simple update to a 1149.1 port to support 1149.7 2-wire signaling. This can be used for reduction in pin count for chips with JTAG interfaces. The IP is in the form of synthesizable verilog. May be implemented in ASIC or FPGA.
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JTAG 2-Wire to 4-Wire Adapter
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Block Diagram of the JTAG 2-Wire to 4-Wire Adapter IP Core
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