400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Local Area Network Controller
Features
- Compatible with Ethernet and IEEE 802.3 10BASE 5 Type A, and 10BASE 2 Type B, 10BASE-T
- Easily interfaced with 80x86, 680x0, Am29000?, Z8000TM, LSI-IITM microprocessors.
- Can be programmed by the host using its internal control and status registers.
- Supports 16 bit wide multiplexed data bus and 24 bit wide address bus.
- Flexible parallel bus interface so as to easily interface with variety of 16 bit microprocessors with minimum glue logic.
- On-board DMA and buffer management, 64-byte Receive, 48-byte Transmit FIFOs.
- Network and packet error reporting.
- Back-to-back packet reception with as little as 0.5 ms interframe spacing.
- Incorporates number of self-test and diagnostic routines to test the operation. Reports both network and packet errors.
- Fully synthesizable Register Transfer Level (RTL) VHDL.
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