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Low-Power 10-bit 4-channel SAR ADC
The ADC has a maximum sampling rate of 7.6KS/s using an external clock of 100KHz frequency and an external convert signal that decides the sampling rate. It is a very low power ADC that takes only 70µW for its operation.
For flexibility of operation, the IP uses an internal reference buffer generating the reference voltage along with a high impedance interface to external reference voltage as well. This IP features good static performance that includes DNL ≤ 0.5LSB and INL ≤ 2LSB that results in having no missing codes.
The IP also features excellent dynamic performance having SNR ≥56dB.
The IP has a design that can be easily ported across various foundries and processes upon request.
For flexibility of operation, the IP uses an internal reference buffer generating the reference voltage along with a high impedance interface to external reference voltage as well. This IP features good static performance that includes DNL ≤ 0.5LSB and INL ≤ 2LSB that results in having no missing codes.
The IP also features excellent dynamic performance having SNR ≥56dB.
The IP has a design that can be easily ported across various foundries and processes upon request.
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Block Diagram of the Low-Power 10-bit 4-channel SAR ADC IP Core
