LPDDR5 IP - High performance and low power

With sophisticated architecture and advanced technology, KNiulink provide LPDDR5 with high performance and low power. In advanced process nodes, KNiulink could offer both controller and PHY IPs. In architecture, it supports Multiport AMBA AXI interface, configurable port number and support asynchronous or synchronous AXI port. For PHY interface, it will integrate DFI compatible design. One de-skew PLL is embedded inside the PHY to improve jitter performance.

• see the entire LPDDR5 IP - High performance and low power datasheet
• get in contact with LPDDR5 IP - High performance and low power Supplier