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1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
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MIPI D-PHY 2-Lane CSI-2 TX (Transmitter) in TowerJazz 65nm
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY.
The IP is configured as a MIPI master optimized for camera interface applications (CSI-2).
The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
The IP is configured as a MIPI master optimized for camera interface applications (CSI-2).
The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control.
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Block Diagram of the MIPI D-PHY 2-Lane CSI-2 TX (Transmitter) in TowerJazz 65nm
Video Demo of the MIPI D-PHY 2-Lane CSI-2 TX (Transmitter) in TowerJazz 65nm
We demonstrate our customer demo, the Teledyne e2v Snappy 2M CMOS Image Sensor, featuring Mixel D-PHY CSI-2 TX IP.