MIPI D-PHY RX 2/4L

The MIPI D-PHY RX 2/4 Lanes macro implements the physical layer of universal lanes for the MIPI D-PHY interface, stacked in a two/four data lanes and one clock lane configuration. The MIPI D-PHY RX 2/4L is used for slave applications. The lane modules are unidirectional with HS-RX and LP-RX functions. The MIPI D-PHY RX 2/4L is targeted for the digital data transmission between a camera and host processor interfaces in mobile applications, supporting a maximum effective bit rate of 1.5 Gbps (per lane). The MIPI D-PHY RX 2/4L builds a highly reliable unidirectional high-speed differential interface for serial data reception with an additional reduced throughput low-power data reception mode in the same differential pair-reducing line count. This minimizes the cable wires and EMI shielding requirements.

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