Non-coherent Network-on-chip (NoC) IP
NC-NoC is physically aware, providing automated insertion and deletion of pipelines to meet timing, generation of placement-aware groups and topologies, and generation of power and frequency-aware NoC generation.
NC-NoC delivers high performance though any-to-any connections at multiple levels. Its packetized architecture provides scalability with maximum throughput and minimum latency. It is parity enabled to provide resiliency.
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Block Diagram of the Non-coherent Network-on-chip (NoC) IP IP Core
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