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1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
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Serial RapidIO - Physical Layer Interface
The Serial RapidIO core supports the physical layer specification as defined in the RapidIO Specification Rev 1.2. The Serial RapidIO Physical Layer defines a protocol for packet delivery between Serial RapidIO devices and other devices, including packet transmission, flow control, error management and link maintenance protocols. The core supports one-lane high speed (1x mode) running at 1.0, 2.0 Gbps or a maximum of 2.5 Gbps. This Serial RapidIO core is optimized to support ORT82G5/ORT42G5 FPSCs.
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Block Diagram of the Serial RapidIO - Physical Layer Interface
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