ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
Smallest, Lowest Power ARM Multicore Applications Processor
Both the extremely area and power efficient Cortex-A5 uniprocessor and the scalable Cortex-A5 MPCore multi-core processors are supported by a rich set of features and Armv7 architectural functionality to deliver a high-performance and low-power solution across both application specific and general purpose designs.
The Cortex-A5 processor includes TrustZone® security technology along with a NEON™ multimedia processing engine first introduced with the Cortex-A8 processor. NEON technology is a 128-bit SIMD (Single Instruction, Multiple Data) architecture extension for the Cortex-A series processors, providing flexible and compelling acceleration for intensive multimedia applications.
View Smallest, Lowest Power ARM Multicore Applications Processor full description to...
- see the entire Smallest, Lowest Power ARM Multicore Applications Processor datasheet
- get in contact with Smallest, Lowest Power ARM Multicore Applications Processor Supplier
Block Diagram of the Smallest, Lowest Power ARM Multicore Applications Processor

ARM IP
- InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
- InCore Azurite Series: 32b/64b RISC-V 2-stage, scalar, in-order, Embedded Processor. RTOS and multi-core capable. Maps upto ARM M-4F. Optimal PPA.
- Quad core IP platform with integrated Arm security subsystem
- ARM HSSTP PHY with Link Layer
- SPI Master / Slave Controller w/FIFO (APB Bus)
- eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)