Smart Card Reader Controller Core
The SCR supports the ISO/IEC 7816-3:2006 and EMV2000 4.0 specifications, which define the electrical signals and transmission protocols for smart cards (also known as integrated circuit cards). It acts as a communication controller, passing data to and from the host system and the smart card. It is fully-featured, and can activate and deactivate cards, perform cold/warm resets, handle ATR response reception, and execute other essential functions.
The SCR consists of the core smart card reader logic with a wrapper for the desired system interface. (AMBA APB and Wishbone interfaces are available; support for other bus interfaces is optional.)
The core is fully synchronous for easier testing and is designed for efficient ASIC or FPGA implementation. It requires, for example, just 6,500 ASIC gates and operates at 300 MHz (TSMC 0.13).
View Smart Card Reader Controller Core full description to...
- see the entire Smart Card Reader Controller Core datasheet
- get in contact with Smart Card Reader Controller Core Supplier
Block Diagram of the Smart Card Reader Controller Core IP Core
Smart Card Reader Controller Core IP
- ISO 7816 based Smart Card Reader IP
- ISO 7816 based digital controller for integrated circuit card compliant with ETSI TS 102 221 and EMV 2000 standards
- IEC 7816 Smart Card IP
- I2C Master / Slave Controller with FIFO (AXI & AXI-Lite Bus)
- ISO/IEC 7816-3 digital controller for interface device compliant with ETSI TS 102 221 and EMV 2000 standards