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NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
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syn1588® enabled IEEE 1588 compliant clock synchronisation
The syn1588® Clock_M IP core offers the full syn1588® technology with a suitable number of trigger and IO events supported. The syn1588® Clock_M IP core is suited for direct integration of a MAC and/or a processor on a single chip (SOC/SOPC design). A standard AHB interface (slave) is available for communication to the host processor executing the PTP Stack.
A typical application example is the syn1588® PCIe NIC. A standard PCIe Ethernet network interface card is made up of a single FPGA that includes the syn1588® Clock_M IP core as well as the Ethernet MAC and the PCIe interface
A typical application example is the syn1588® PCIe NIC. A standard PCIe Ethernet network interface card is made up of a single FPGA that includes the syn1588® Clock_M IP core as well as the Ethernet MAC and the PCIe interface
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Block Diagram of the syn1588® enabled IEEE 1588 compliant clock synchronisation
