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USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
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TSMC Samsung GF Intel CML mux - on-chip clock buffer
Distribute high-performance clock across your chip with reduced supply-noise coupling. See our features list for more details.
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LVDS IP
- TSMC GF LVDS Tx/Rx with optional CMOS I/O
- TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF