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NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
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Ultra-low jitter, low-power ring-oscillator-based PLL-4GHz-5GHz
InCirT’s APLL5GGF22 is the ring-oscillator based analogue-PLL which provides ultra-low jitter (400fs rms jitter at 5GHz) and low-power consumption (3.5mW at 5GHz) operating from 4GHz up to 5GHz.
Due to its ultra-small area (0.007sq mm) APPLL5GGF22 is an ideal candidate for SOC designs requiring multiple clock domains.
APLL5GGF22 is an integer-N PLL which gives flexibility to the designers to find the best clock-domain in the overall system.
Due to its ultra-small area (0.007sq mm) APPLL5GGF22 is an ideal candidate for SOC designs requiring multiple clock domains.
APLL5GGF22 is an integer-N PLL which gives flexibility to the designers to find the best clock-domain in the overall system.
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