USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+

The combination PHY comprises of a Serial ATA (SATA) compliant with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) compliant with the PCIe 2.0 Base Specification with compatibility for the PIPE interface spec, and a USB compliant with the USB 3.0, USB 2.0 (USB High-speed and Full speed). Lower power usage is achieved by supporting more PLL control, reference clock control, and internal power gating control. Additionally, because the aforementioned low power mode option is configurable, the PHY is widely applicable for a variety of situations under different considerations of power consumption.

• see the entire USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+ datasheet
• get in contact with USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+ Supplier