USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF

The combination PHY consists of a Serial ATA (SATA) conforming with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) compatible with the PIPE interface protocol, and a USB compliant with the USB 3.0, USB 2.0 (USB High-speed and Full speed). Supporting more internal power gating, reference clock control, and PLL control results in lower power consumption. Additionally, the PHY is extensively useful for a range of circumstances under varying considerations of power consumption due to the adjustable nature of the aforementioned low power mode option.

• see the entire USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF datasheet
• get in contact with USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF Supplier