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V-By-One HS Receiver PHY
Features
- Next generation HD interface with low EMI
- Fully comply with V-By-One HS V1.3 electrical specification
- Low power consumption for multiple lane application
- Compact size: 0.1mm2 per lane including PMU and IO PAD
- Support Data rate: 0.6Gbps~4Gbps per lane
- 9bit/10bit parallel interface
- Implemented CTLE to compensate channel loss
- Integrated on-die termination resistors
- Tolerance frequency offset up ±15000ppm
- Build-in self-test facility
- AC coupling
- Support up to x16 lanes
- Support BGA, QFN/QFP package
- ESD performance: HBM >6000V / IEC >6000V
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