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VDC-M (VESA Display Compression-M) Decoder
The Rambus VESA VDC-M 1.2 Decoder IP Core (formerly from Hardent) implements a fully compliant VESA Display Compression-M (VDC-M) 1.2 decoder to deliver visually lossless video compression. The decoder supports various usage models, including typical MIPI Display Serial Interface 2 (MIPI DSI-2) usage models.
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Block Diagram of the VDC-M (VESA Display Compression-M) Decoder IP Core
VESA IP
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Receiver
- VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
- VESA DSC (Display Stream Compression) 1.2b Video Encoder
- VESA DSC (Display Stream Compression) 1.2b Video Decoder
- ASIL-B Ready ISO 26262 Certified VESA DSC (Display Stream Compression) 1.1 Encoder
- VDC-M (VESA Display Compression-M) Encoder