FPGA / CPLD News
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Lattice and Helion Technology Announce Compression and Encryption IP Cores for the LatticeECP3 FPGA Family (Monday Mar. 28, 2011)
Lattice and Helion Technology today announced a portfolio of Compression and Encryption IP cores, available now, for the LatticeECP3(TM) FPGA family. The portfolio features a Payload Compression System core that enables improved utilization of constrained channel bandwidth.
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Xilinx Ships World's First 28nm FPGA Device and Demonstrates Application Development Platform for Next Generation Systems (Monday Mar. 21, 2011)
Xilinx today announced the beginning of the 7 series FPGA rollout with shipment of the first Kintex(TM)-7 K325T Field Programmable Gate Array (FPGA), marking the industry's fastest product rollout of next generation programmable logic devices built with 28nm technology.
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SiliconBlue Well Poised for the "Year of the Smartphone" (Monday Mar. 21, 2011)
SiliconBlue announced today that it has captured design wins in over 30 different smartphones and mobile internet devices driven by the intense competition and growth in this segment of the handset market.
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LatticeXP2 FPGAs Power the First Low Power, Real-Time Video Processing Engine (Tuesday Mar. 15, 2011)
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that Thruput Ltd has chosen its LatticeXP2 FPGAs for use in MIDAS, the first low-power, lossless real-time video processing platform.
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Lattice Ships 10 Millionth Power Manager Device (Monday Mar. 14, 2011)
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that it has shipped more than 10 million Power Manager devices since their introduction.
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Microsemi Announces Comprehensive Solar Technology Portfolio (Wednesday Mar. 09, 2011)
Microsemi today announced the immediate availability of its solar technology portfolio. Microsemi's products for renewable energy applications include SmartFusion and IGLOO® FPGAs; analog, mixed signal devices such as bypass diodes/switches, MOSFETs, FREDs and IGBTs; DC-DC converters, and pulse width modulation (PWM) modules.
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ISE Design Suite 13 Kicks-off Broad Support for 7 Series FPGAs and Delivers Enhanced System Level Productivity With New Team Design Flow (Tuesday Mar. 08, 2011)
Xilinx today announced the immediate availability of ISE(R) Design Suite ISE13. New to the award winning design tool and IP suite are enhancements which improve productivity across SoC design teams and progression towards true plug-and-play IP that targets Spartan(R)-6, Virtex(R)-6 and 7 series FPGAs, including the industry-leading 2-million-logic-cell Virtex-7 2000T device.
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Avago Technologies and Xilinx Streamline Design of 10 Gigabit Ethernet Systems Using FPGAs and Optical Interconnects (Tuesday Mar. 08, 2011)
Avago Technologies and Xilinx today announced completion of interoperability testing between Xilinx(R) Virtex(R)-6 HXT FPGAs and Avago SFP+ and QSFP+ optical transceiver modules. The testing proves the design and interoperability of 10 Gigabit and 40 Gigabit Ethernet ports using optical interfaces from Avago with the market-leading transceiver jitter performance of Virtex-6 HXT FPGAs.
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Xilinx Announces Flexible Platform for 100G Optical Transport Network Solutions Development and Smooth Transition to 400G (Monday Mar. 07, 2011)
Xilinx today announced at the 2011 Optical Fiber Communications Conference and Exposition its Virtex(R)-6 HXT FPGA Optical Transport Network (OTN) Targeted Design Platform for supporting faster market implementation of 100G line cards and demonstrating the key technology for a smooth path to the development of future 400G line cards.
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Microsemi Announces Expanded Industrial Ecosystem for SmartFusion Intelligent Mixed Signal FPGAs (Wednesday Mar. 02, 2011)
Microsemi today announced an expanded industrial ecosystem for SmartFusion intelligent mixed signal FPGAs. This new ecosystem strengthens the current SmartFusion device ecosystem and includes further support by Microsemi partners.
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Microsemi Announces SmartFusion Intelligent Mixed Signal FPGAs Now Available with uClinux (Wednesday Mar. 02, 2011)
Microsemi today announced that open source U-Boot firmware and uClinux are now available on SmartFusion intelligent mixed signal FPGAs.
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Xilinx Zynq EPPs based on two ARM Cortex-A9s create a new category that fits in among SoCs, FPGAs, and microcontrollers (Tuesday Mar. 01, 2011)
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Xilinx Introduces Zynq-7000 Family, Industry's First Extensible Processing Platform (Tuesday Mar. 01, 2011)
Supported by an extensive ecosystem of tools and IP providers, the Zynq-7000 family tightly integrates a complete ARM(R) Cortex(TM)-A9 MPCore(TM) processor-based system with 28nm, low-power programmable logic for system architects and embedded software developers to extend, customize, optimize, and differentiate their systems.
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HRD Video Camera Development Kit and Evaluation Reference Design Now Available for LatticeECP3 FPGA Family (Tuesday Feb. 22, 2011)
Lattice Semiconductor today announced the release of the Lattice HDR-60 Video Camera Development Kit, a production-ready High Definition (HD) video camera development system based on the LatticeECP3™ FPGA family.
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Achronix and Mentor Graphics provide state of the art physical synthesis support for Speedster22i FPGAs - the world's most advanced FPGAs leveraging Intel's 22nm process technology (Monday Feb. 21, 2011)
Achronix today announced the closing of a formal agreement with Mentor Graphics to provide advanced synthesis support for Achronix Semiconductor’s Speedster22i Field Programmable Gate Arrays (FPGAs).
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Tabula Accelerates Development of ABAX 3PLDs with New Development Kit (Tuesday Feb. 15, 2011)
Tabula, Inc. today announced the immediate availability of a development kit to accelerate the creation of designs based on its groundbreaking ABAX family of 3PLDs. This comprehensive development system will aid FPGA and ASIC designers to implement and test a rich variety of parallel and serial interfaces such as DDR3 and PCI Express Gen2, as well as embedded systems based on the popular V1 ColdFire soft CPU.
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Altera Delivers Industry's First Interface Targeting MoSys's Serial, High-Density Bandwidth Engine Device (Tuesday Feb. 08, 2011)
Altera today announced it successfully completed interoperability testing between its Stratix® IV GT FPGA and the Bandwidth Engine® device from MoSys in a serial memory application. Stratix IV GT FPGAs leverage the GigaChip™ Interface to interoperate with MoSys's Bandwidth Engine device, providing designers of 100G wireline applications, such as traffic management and packet processing, a high-performance, high-bandwidth memory solution.
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Xilinx to Demonstrate Its Targeted Design Platforms for Radio and Baseband Processing at Mobile World Congress 2011 (Monday Feb. 07, 2011)
Xilinx today announced its participation at Mobile World Congress 2011 in Barcelona. Xilinx will showcase its Targeted Design Platforms targeting cellular infrastructures by using FPGAs that enable global wireless communications with lower cost and power solutions for radio, baseband, and connectivity.
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Microsemi Announces High-Level Synthesis Support from Synopsys (Friday Jan. 28, 2011)
Microsemi today announced that Synopsys' Synphony Model Compiler, a design tool suite for hardware DSP algorithm design, now provides support for Microsemi FPGAs.
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Altera Unveils 28-nm Device Portfolio Tailored to Customers' Diverse Design Requirements (Monday Jan. 24, 2011)
Altera today announced its portfolio of 28-nm devices. Altera is providing customers clearly differentiated solutions across the new Cyclone® V and Arria® V FPGA families, the recently expanded Stratix® V FPGA and previously announced HardCopy® V ASIC families.
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Xilinx Consumer Video Kit Drives Innovation for 3DTV and Other Digital Displays with More Bandwidth and Standards Support (Thursday Jan. 06, 2011)
Xilinx today announced a new version of its Spartan(R)-6 FPGA Consumer Video Kit. Co-developed with and distributed by Tokyo Electron Device, the Consumer Video Kit supports the latest serial digital TV interfaces, including DisplayPort 1.1a, V-by-One(R) HS, HDMI(TM) 1.4a (now supporting 3DTV) and LVDS of up to 1.05 Gbp
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Altera's Stratix IV GT FPGA Successfully Passes Ethernet Alliance's HSE Interoperability Test Targeting 100-Gigabit Ethernet Systems (Tuesday Jan. 04, 2011)
Altera today announced it successfully passed the first Ethernet Alliance Higher Speed Ethernet (HSE) subcommittee interoperability event tests targeting products designed to support 100-Gigabit Ethernet (100GbE) systems.
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1,000 processors on a Xilinx FPGA (Tuesday Jan. 04, 2011)
Scientists at the University of Glasgow have created a 1,000-core computer processor based on a Xilinx field programmable gate array.
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Altera Accelerates FPGA Design Productivity in Quartus II Software Version 10.1 with Next-Generation System-Integration Tool (Monday Dec. 06, 2010)
Altera today announced the release of its Quartus® II development software version 10.1, the programmable logic industry's number-one software in performance and productivity for CPLD, FPGA and HardCopy® ASIC design.
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Xilinx Extends Comprehensive DSP Portfolio with New Spartan-6 FPGA and Virtex-6 FPGA DSP Development Kits (Monday Dec. 06, 2010)
Xilinx today announced the availability of three new development kits that further extend the ability of digital signal processing developers to easily adopt FPGAs in order to reach the highest levels of signal processing performance, optimize for cost and power and relieve system bottlenecks through co-processing.
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Altera Unveils Process Technology Strategy for Its 28-nm Product Portfolio (Monday Dec. 06, 2010)
Altera today announced its 28-nm process technology strategy targeting its 28-nm product portfolio. In addition to the previously announced support for TSMC’s 28-nm High Performance (28HP) process technology for its high-end FPGA family, Altera will also utilize TSMC's 28-nm Low-Power (28LP) process technology for use in its low-cost and midrange product families.
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LatticeECP3 Device Is First Low Cost FPGA to Support Broadcom HiGig(TM) Protocol (Monday Nov. 29, 2010)
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of the HiGig(TM) MAC IP core for its award winning, low cost LatticeECP3(TM) FPGA family.
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Xilinx Virtex-7 HT Devices Enable 100-400Gbps Applications and Beyond in a Single FPGA for Next Generation Communication Systems (Wednesday Nov. 17, 2010)
Up To Sixteen 28Gbps Serial Transceivers in New FPGA for Industry's Highest Bandwidth Line Cards Supporting Major High-Speed Serial, Optical and Backplane Protocols
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DediProg Now Offers Volume Production Programming Solution for SiliconBlue's Custom Mobile Devices (Monday Nov. 15, 2010)
SiliconBlue Technologies and DediProg today announced the immediate availability of high-volume programming support for SiliconBlue’s non-volatile configuration memory (NVCM) technology with the Race100 family of industrial gang programmers.
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Fusion Mixed Signal FPGAs Now Available In Extended Temperature Grade (Tuesday Nov. 09, 2010)
Microsemi today announced that Fusion mixed signal FPGAs are now available with 100% temperature screening from -55°C to +100°C.