FPGA / CPLD News
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Xilinx Virtex-6 HXT FPGAs Deliver Superior Transceiver Performance for Wired Optical Communications (Monday Nov. 08, 2010)
Xilinx today announced the immediate availability of Virtex(R)-6 HXT FPGAs that support 40Gbps and 100Gbps line cards with flexible port configurations including 1x40Gbps, 4x10Gbps, 1x100Gbps and 10x10Gbps.
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Lattice MachXO2 PLD Family Sets New Standards for Low Cost, Low Power Designs (Monday Nov. 08, 2010)
Lattice today unveiled its new MachXO2(TM) PLD family, which offers designers of low-density PLDs an unprecedented mix of low cost, low power and high system integration in a single device. Built on a low power 65-nm process featuring embedded Flash technology, the MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the MachXO(TM) PLD family.
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Quickpath IP bound for Achronix FPGAs (Thursday Nov. 04, 2010)
Achronix Semiconductor Corp. will be including the hard Quickpath IP core in support of processor communications on forthcoming field programmable gate arrays enabled by Intel manufacturing.
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New PCI Express Root Complex Lite Solution Uses the LatticeECP3 FPGA Family (Tuesday Nov. 02, 2010)
Lattice Semiconductor today announced the immediate availability of the PCI Express Root Complex (RC) Lite solution based on the LatticeECP3(TM) and LatticeECP2M(TM) FPGA families for use in simple bridging application to any legacy host bus.
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Achronix to Build the World's Most Advanced Field Programmable Gate Arrays (FPGAs) on Intel 22nm Process Technology (Monday Nov. 01, 2010)
Achronix Semiconductor Corp. today announced strategic access to Intel Corporation’s 22 nanometer (nm) process technology, and plans to develop the most advanced Field Programmable Gate Arrays (FPGAs).
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Xilinx Expands Secure Mobility and Ruggedized Performance Offering with Next Generation of Defense-Grade Families (Thursday Oct. 28, 2010)
Xilinx today announced the Spartan(R)-6Q family and Virtex(R)-6Q family, its newest generation of field programmable gate arrays (FPGAs) qualified for meeting the rigorous requirements of the aerospace and defense market.
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New PAC-Designer 6.0 Software Enables Designers to Transform Board Management With New Platform Manager Devices (Wednesday Oct. 27, 2010)
Lattice Semiconductor today announced its new PAC-Designer ® design software version 6.0, which enables analog and board designers to integrate a circuit board’s power management and digital board management functions into the newly announced Platform Manager™ device family.
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National Instruments Increases IP Availability With New NI LabVIEW FPGA IPNet (Wednesday Oct. 20, 2010)
National Instruments today introduced its new version of NI LabVIEW FPGA IPNet, an online resource that helps digital design engineers browse, download and share the latest intellectual property (IP) for field-programmable gate array (FPGA) design applications.
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Xilinx FPGA Development Platforms Jump Start Innovation for Smarter Automotive System Designs at SAE Convergence 2010 (Tuesday Oct. 19, 2010)
Xilinx today announced three automotive Targeted Design Platforms that enable automotive system designers to use FPGA technology to meet the advanced performance and integration requirements of driver assistance, driver information and infotainment systems.
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Lattice Announces Serial RapidIO 2.1 AMC Evaluation Platform (Tuesday Oct. 19, 2010)
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Actel's ProASICPLUS and ProASIC3 FPGAs Selected by Advantech for Networking and Gaming Platforms (Tuesday Oct. 19, 2010)
Actel today announced that its ProASICPLUS ® and ProASIC®3 FPGAs have been selected by Advantech, Co., Ltd. for use in its networking and gaming platforms.
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Altera Cuts Development Time and Increases Industrial Design Flexibility With a Kit and a Click (Monday Oct. 18, 2010)
Altera today announced the expansion of its Industrial Networking Partner Program (INPP) with a new Industrial Networking Kit (INK) from Terasic. Through one convenient online site at altera.com, designers can now access the kit and Altera's industrial intellectual property (IP) partners in one place.
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Xilinx Transforms Ecosystem to Accelerate Mainstream Adoption of Programmable Platforms (Monday Oct. 18, 2010)
Xilinx today announced it is transforming its ecosystem by opening the Xilinx platform and supporting key industry standards to establish an FPGA marketplace that extends the breadth and depth of its Alliance Program.
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Lattice Ships 50 Millionth MachXO Programmable Logic Device (Monday Oct. 18, 2010)
Lattice today announced that it has shipped more than 50 million MachXO(TM) PLDs since their introduction just five years ago.
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Altera Launches Embedded Initiative with New System Level Integration Tool for Embedded Systems Configurability (Tuesday Oct. 12, 2010)
Altera today announced its Embedded Initiative. With this initiative, Altera is providing designers a single FPGA design flow based on its Quartus® II development software—including the new Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and new ARM® Cortex™-A9 MPCore™ and MIPS® Technologies MIPS32 embedded processor offerings.
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Lattice Announces Update to ispLEVER FPGA Design Tool Suite (Tuesday Oct. 12, 2010)
Lattice today announced the availability of Service Pack 1 for Version 8.1 of its ispLEVER(R) FPGA design tool suite. Service Pack 1 is an important update for designers targeting mid-range LatticeECP3(TM) devices using the ispLEVER tool suite.
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New Lattice "Platform Manager" Transforms Board Power and Digital Management (Tuesday Oct. 12, 2010)
Lattice today announced its third-generation mixed-signal devices, the Platform Manager(TM) family. The programmable Platform Manager devices are expected to simplify board management design significantly by integrating programmable analog and logic to support many common functions, such as power management, digital housekeeping and glue logic
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C-Compiler Support Now Available for LatticeMico8 Microcontroller (Monday Oct. 11, 2010)
Lattice today announced the availability of GNU software development tools for its LatticeMico8 soft processor. The tool chain, including a GCC C-Compiler and Linker, was developed as part of an ongoing collaboration with Beyond Semiconductor.
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SiliconBlue's New Paradigm Breaks Through the Volume Barrier (Friday Oct. 01, 2010)
SiliconBlue® Technologies, the leader in mobileFPGA™ devices designed for mobile handset applications, announced today that it has shipped over 1 million units in calendar 3rd quarter of this year.
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Lattice Semiconductor Announces Video Display Interfaces Suite for HDMI, DVI, and 7:1 LVDS (Monday Sep. 27, 2010)
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of a comprehensive video display interfaces suite for High-Definition Multimedia Interface (HDMI 1.3a), Digital Visual Interface (DVI), and 7:1 LVDS Interface. All of these display interfaces are available as free Reference Designs for the award winning, mid-range LatticeECP3(TM), while selected free Reference Designs can also be ported to the LatticeECP2M(TM) and LatticeXP2(TM) FPGA families.
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Actel Announces SmartFusion FPGA Motor Control Reference Designs (Tuesday Sep. 21, 2010)
Actel today announced the availability of SmartFusion™ intelligent mixed signal FPGA reference designs targeting motor control applications. The reference designs, implemented in a single SmartFusion device, illustrate Field Oriented Control (FOC) using various feedback methods for permanent magnet synchronous motors (PMSMs).
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Altera Achieves Major Milestone in Addressing Industry's Bandwidth Demands by Demonstrating 25-Gbps Transceivers in Programmable Logic (Monday Sep. 20, 2010)
Altera today announced it has achieved a significant milestone in transceiver technology by becoming the first company to successfully demonstrate 25-Gbps transceiver performance in programmable logic. Altera achieved this milestone in its 28-nm transceiver test chip, a prototyping platform that Altera is using to successfully deploy 28-Gbps transceivers on 28-nm FPGAs.
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SmartFusion A2F500 Development Kit Now Available from Actel (Thursday Sep. 16, 2010)
For customers wanting to take immediate advantage of the highest density member of Actel's SmartFusion™ intelligent mixed signal FPGA family, the company today announced the availability of the A2F500 Development Kit. The kit is supported by Actel's Libero® Integrated Design Environment (IDE), which includes SoftConsole Eclipse-based embedded software development environment.
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Actel Announces Largest SmartFusion Device in Production (Thursday Sep. 16, 2010)
Actel today announced that the largest SmartFusion™ device is now in production. SmartFusion intelligent mixed signal FPGAs are the only devices to integrate an FPGA, an ARM® Cortex™-M3 processor and programmable analog, offering full customization, IP protection and ease-of-use.
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Xilinx Demonstrates Intel(R) QuickPath Technology for FPGAs at Intel Developer Forum (Thursday Sep. 16, 2010)
Xilinx today showcased the Intel(R) QuickPath Interconnect technology for enabling the integration of FPGA in high performance computing applications. The demonstration shows how high-performance Virtex FPGAs can support the low latency and memory coherency benefits of Intel(R) QPI when paired with Intel(R) Xeon(R) processors in HPC systems.
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Actel Launches Actel Direct Sales Channel in North America (Monday Sep. 13, 2010)
Actel today announced Actel Direct, a sales channel supplying North American customers with simple and streamlined direct sales, fulfillment and application support. Operated by the company, Actel Direct is focused on ensuring the highest level of service to customers by providing same day turnaround on quoting, and processing orders within 24 hours of receipt.
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Actel FPGAs Now Available with Cryptographic Cores Offering DPA Resistance (Monday Sep. 13, 2010)
Actel today announced that several of its FPGAs are now usable with cryptographic cores offering differential power analysis (DPA) resistance. Customers designing with SmartFusion™, Fusion, ProASIC®3 and IGLOO® devices can now protect their secret keys from DPA attacks by implementing AES, GCM or ECC intellectual property cores from IP Cores, Inc.
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Xilinx FPGA Development Platform Enables Broadcast Equipment Makers to Meet Real-Time 3D TV Bandwidth and Processing Demands (Friday Sep. 10, 2010)
Xilinx today announced a new development platform for engineers working to meet the rapidly growing demand for 3D TV broadcast and other high definition video applications. The Xilinx(R) Spartan(R)-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core enable broadcast system designers to build full systems for driving the high-speed transmission and real-time processing of video in a full range of professional broadcast applications including cameras, switchers, routers, encoders, monitors and cinema projectors.
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Xilinx and NSA Announce Approval of Virtex-5Q FPGA Solution for High-Grade Cryptographic Processing (Tuesday Sep. 07, 2010)
Xilinx today announced that the latest version of its high-performance programmable solution for high assurance applications in the aerospace and defense (A&D) industries has been approved for use in Type 1 Crypto Systems by the National Security Agency (NSA).
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Altera Demonstrates Industry's First Single-Chip 4K Format Conversion Reference Design at IBC2010 (Tuesday Sep. 07, 2010)
Altera today announced it will demonstrate the industry's first single-chip 4K, format conversion reference design with integrated serial digital interface (SDI) at IBC2010 in Hall 5, Booth A19, September 9 to 14, at the RAI Center in Amsterdam.