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IP / SOC Products News

• Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies (Monday Jan. 25, 2010)
  IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth
  
  
• Arasan Chip Systems provides complete solutions for the key Bus Interfaces in the emerging Netbook market (Monday Jan. 25, 2010)
  Arasan Chip Systems announced that its IP portfolio provides the most comprehensive and complete set of solutions for the growing Netbook market
  
  
• Vivante and Animated Media Partner to Offer Embedded Flash Solutions Optimized for Vivante OpenGL ES 2.0 Graphics Processors (Wednesday Jan. 20, 2010)
  Flash Tools Can Be Used to Create Browser-less Embedded Flash Applications that are Translated To OpenGL ES 2.0 and Rendered by the Vivante GPU
  
  
• Ukalta Engineering Introduces FPGA-Based Fading Channel Simulators (Wednesday Jan. 20, 2010)
  Ukalta Engineering today introduced its line of FPGA-based fading channel simulators. Available as ultra-compact IP cores, wireless developers can now rapidly and easily validate the performance of their communication systems under realistic radio channel conditions, all on a single FPGA.
  
  
• Dolphin Integration strengthens their portfolio of Standard Cell libraries with the DUAL innovation targeting Low Power designs (Monday Jan. 18, 2010)
  HD-BTF.DV is the custom tailored standard cell library of medical applications, power sensitive nomad applications and battery-driven industrial applications
  
  
• Evatronix USB 2.0 Controller Secures USB Certification for Richnex High Speed USB Transceivers (Monday Jan. 18, 2010)
  Evatronix SA and Richnex announced today the successful USB certification of the Richnex USB transceiver - RN1170, in which the Evatronix USB High Speed On-The-Go Controller IP was implemented as a reference design.
  
  
• Intelop announces Xilinx FPGA development platform for their TCP-Offload Engine SoC IP (Monday Jan. 18, 2010)
  Intelop announces Xilinx FPGA development platform for their TCP-Offload Engine SoC IP for customers to easily develop networking solutions with TCP/IP acceleration. This second generation Customizable Full TCP offload integrates GEMAC, ARP module, PLB/AMBA 2.0 bus interfaces with Optional PCIe interfaces running at 2-Gbps also is capable of managing hundreds of simultaneous TCP sessions at delivering 10-20 times performance improvement over TCP/IP software implementations.
  
  
• Synopsys Introduces Industry's First SystemC TLM-2.0 SuperSpeed USB 3.0 Models (Tuesday Jan. 12, 2010)
  Synopsys today announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC™ Initiative (OSCI) TLM-2.0 API specification.
  
  
• Arasan Chip Systems Adds DigRFSM 3G IP to its MIPI IP Portfolio (Tuesday Jan. 12, 2010)
  Arasan Chip Systems announced the release of its DigRFSM 3G IP core that enables the integration of 2.5G/3G cellular chipsets into mobile platforms.
  
  
• Imagination announces META AXD audio processor IP platform (Friday Jan. 08, 2010)
  Imagination Technologies, a leading multimedia chip technologies company announces META AXD, a full audio IP platform delivering a complete multi-standard and multi-stream audio solution for System-on-Chip (SoC) designs.
  
  
• Imagination Technologies announces POWERVR SGX545 graphics IP core with full DirectX 10.1, OpenGL 3.2 and OpenCL 1.0 capabilities (Friday Jan. 08, 2010)
  Imagination Technologies announces POWERVR SGX545, the first and only DirectX10.1 capable embedded graphics IP core available for immediate licensing.
  
  
• New Imagination Technologies' video decoder cores to support On2 VP6 video format (Friday Jan. 08, 2010)
  Imagination Technologies and On2 Technologies are working together to enable Imagination Technologies to support decoding of On2 video formats, beginning with On2 VP6, which will be introduced into the POWERVR VXD family in early Q1 2010.
  
  
• Magnum Semiconductor Launches a High Definition Video Compression IP Solution (Thursday Jan. 07, 2010)
  Magnum Semiconductor announced today it is launching an IP license business, which will provide its high-quality Video CODEC IP, proven through decades of deployment in Tier 1 video markets, to Semiconductor companies.
  
  
• Imagination demonstrates real time Wi-Fi and reveals ATSC capabilities on latest ENSIGMA UCCP310 communications IP platform (Thursday Jan. 07, 2010)
  Imagination Technologies is demonstrating a test chip incorporating Imagination’s latest ENSIGMA UCCP310 IP platform . This is the only multi-standard communications IP core available in the market today that can be demonstrated to deliver both 802.11 a/b/g Wi-Fi connectivity and a broad suite of demodulators required for digital TV broadcasts worldwide, including ATSC and all of the major European and Japanese terrestrial standards, in a single programmable IP core.
  
  
• Imagination demonstrates POWERVR FRC270 Frame Rate Conversion IP Core (Thursday Jan. 07, 2010)
  POWERVR FRC IP cores enable highly intelligent up-sampling of up to HD resolution content from 24fps to 100/120fps up to 200/240fps, with excellent de-judder and motion de-blur characteristics. The IP core will be shown running in a real-time FPGA-based system.
  
  
• SoftJin announces PAL-NTSC Encoder IP for various display systems including SDTV and HDTV (Thursday Jan. 07, 2010)
  SoftJin’s PAL-NTSC Encoder IP (along with SoftJin’s HD Video encoder IP) accepts SD/ HD video data generated by various sources such as video decoders (MPEG/ H.264 decoder) and converts it to data format accepted by a wide range of analog and digital display devices. The IP is capable of sending data in both SD and HD formats.
  
  
• TranSwitch to Unveil Latest High Definition Video Interconnect Technology at 2010 International CES (Monday Jan. 04, 2010)
  TranSwitch will formally introduce its latest High Definition Multimedia Interface™ (HDMI) for next generation digital television (DTV) and home theatre applications at the 2010 International CES trade show. The HD-PXL™-1.4 includes 3D Video and support for new 4K super resolution displays.
  
  
• Digital Blocks Supports the AMBA Interconnect on Xilinx FPGAs with its portfolio of AXI / AHB / APB IP Cores (Wednesday Dec. 30, 2009)
  Digital Blocks today announces its support of the AMBA® Interconnect on Xilinx® FPGAs with Digital Blocks Peripheral IP cores.
  
  
• Ukalta Engineering Announces Ultra-Compact AWGN IP Library (Tuesday Dec. 22, 2009)
  Ukalta Engineering today announced the commercial availability of its Gaussian noise generator Intellectual Property (IP) cores. With the smallest footprint, best accuracy and highest throughput currently available on the market these IP cores provide an ideal solution for bit-error rate testing of communication systems over additive white Gaussian noise (AWGN) channels.
  
  
• Silicon Image Introduces New 4K and 3D H.264 Digital Video Decoder IP Core (Tuesday Dec. 15, 2009)
  Silicon Image today announced the newest member of its IP core family, the cineramIC™ 4K and 3D H.264 digital video decoder. With its high performance, low cost and high-quality video imaging, the cineramIC IP core can be integrated into System-on-Chips (SoCs) for next-generation digital TV (DTV), set-top-box (STB) and camcorder applications, as well as professional video editing, broadcast, medical and surveillance FPGA applications.
  
  
• Arasan Chip Systems Announces Innovative SD 3.0 / eMMC 4.4 Card Controller IP (Tuesday Dec. 15, 2009)
  Arasan announced today the availability of the World's first SD 3.0 / eMMC 4.4 Card Controller IP compliant with the latest SD Memory v3.0 and Multimedia Card eMMC 4.4 specifications. Arasan's Card Controller IP supports transfers up to 104MB/s and incorporates all standard security features.
  
  
• Virage Logic Introduces the Ultra Compact and Low Power ARC(R) 601 32-Bit Microprocessor Core (Tuesday Dec. 15, 2009)
  The ARC 601 Offers a Remarkable Combination of Small Size, Lower Power and Outstanding Performance for Embedded and Microcontroller Applications
  
  
• Crack Semiconductor's CS1024-RSA Sets New RSA Compute-Offload Performance Standard (Tuesday Dec. 15, 2009)
  Crack Semiconductor announces today that its RSA compute offload engine, the CS1024-RSA, has demonstrated a measured performance of at least 177 RSA-1024 full exponent 1024-bit operations per second in a 32-bit Silicon IP core.
  
  
• CEVA and Gennum's Snowbush IP Group Partner to Deliver Complete SAS 2.0 IP Solution for Embedded Storage Applications (Monday Dec. 14, 2009)
  CEVA and Snowbush today announced that they have partnered to deliver a complete Serial Attached SCSI (SAS) 2.0 IP solution optimized for embedded storage applications. The integrated offering combines Snowbush silicon-proven 6.0Gbps PHY IP integrated with CEVA's SAS 2.0 Controller IP, offering the industry's most mature and feature rich SAS 2.0 IP solution.
  
  
• Avalon Announces Working 100GE over OTN Transponder Application (Thursday Dec. 10, 2009)
  Avalon is pleased to announce our first working 100GE over OTN transponder application, using our industry-leading Zenobia Virtual Application-Specific Standard Product (V-ASSP) in conjunction with the "Cobra" 100G demonstration platform.
  
  
• Denali Announces State-of-the-Art GHz DDR PHY Technology (Thursday Dec. 10, 2009)
  Denali today revealed a new phase PHY technology for DDR SDRAM physical interfaces, delivering memory system performance up to 1066 MHz clock speeds (or DDR-2133 data rates) on 65-nanometer foundry process nodes or lower.
  
  
• GDA Technologies Adds PowerPC(R) 440T90 Hard Macro to Its Portfolio Using TSMC 90nm Process Technology (Thursday Dec. 10, 2009)
  GDA Technologies has announced that it is adding IBM's PowerPC 440T90 to its existing 405S and 460S products using TSMC 90nm process technology.
  
  
• Mixel first to market with Unified MIPI/MDDI PHY IP solution (Wednesday Dec. 09, 2009)
  Mixel announced today the availability of the first MIPI/MDDI unified PHY IP solution. The IP combines a MIPI D-PHY compliant with revision 1.0 of the MIPI standard, with an MDDI-PHY compliant with revision 1.2 of the MDDI standard.
  
  
• IPextreme Teams Up with Infineon To Bring Complete Bluetooth IP Solution to Market (Wednesday Dec. 09, 2009)
  IPextreme has extended its partnership with Infineon Technologies AG to bring Infineon’s BlueMoon™ UniCellular Bluetooth® 2.1 solution featuring Enhanced Data Rate (EDR) functionality to the broad semiconductor market in the form of a complete licensable IP core.
  
  
• Xelic Announces Availability of 40G Enhanced Forward Error Correction Core for Optical Transport Networking Applications (Tuesday Dec. 08, 2009)
  Xelic today announced the expansion of their Enhanced Forward Error Correction core offering based on ITU-T G.975.1 Specifications.