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IP / SOC Products News

• Sarnoff Releases Acadia II SoC Development Platform (Tuesday Dec. 08, 2009)
  Sarnoff Corporation, the leader in advanced embedded video processing, today introduced the Acadia® II Development Platform (A2-DP-1). The A2-DP-1 provides a complete engineering platform for evaluating and integrating the capability of the Acadia II SoC, along with customer developed algorithms and system level processing.
  
  
• CEVA Unveils Industry's First C-Based Application Optimization Toolchain for Licensable DSPs (Monday Dec. 07, 2009)
  CEVA-Toolbox™ Software Development Environment includes new Application Optimizer, significantly reducing software development time and improving performance of customers’ target applications by more than 60%
  
  
• ARM Cortex-M0 Processor - Fastest Licensing ARM Processor (Thursday Dec. 03, 2009)
  ARM announced today that the Cortex™-M0 processor is the fastest licensing ARM® processor, having secured 15 licenses already this year, with more predicted by the end of 2009. Cortex-M0 was released just nine months ago.
  
  
• Evatronix Usb-if verified USB 3.0 Device controller achieves over 430 mb/s (Thursday Dec. 03, 2009)
  Industry’s top throughput, xHCI host verification and availability as a single-chip FPGA solution add even more value to the state-of-the-art USB 3.0 peripheral controller.
  
  
• Evatronix Announces Formation Of The Technical Advisory Board (Thursday Dec. 03, 2009)
  Evatronix announced today the formation of the Technical Advisory Board and also the appointment of the TAB members. The members are Carl Das, Ph.D. - Director of ASIC Services at IMEC; Jean Mermet, Ph.D. - Chief Scientist of SAFEtronix; Prof. Dr. Wolfgang Rosenstiel - professor for Computer Engineering at the University of Tübingen, and Richard Tobias, Vice President of Operations and Engineering at Samplify Systems, Inc.
  
  
• Novocell Semiconductor Announces the Development Of A Multi-Time Programmable Antifuse Bit Cell (Wednesday Dec. 02, 2009)
  Novocell today announced the development of 2nTP, a new multi-time programmable (MTP) technology that allows the programming of its one-time programmable (OTP) antifuse bit cell up to eight (8) times. 2nTP can be configured as a two, four, or eight times write, and it is based on the NovoBlox™ bit cell, a non volatile memory (NVM) already proven at leading foundries.
  
  
• Sonics Offers Free Evaluation for Designers of Sonics Network for AMBA Protocol Solution (Tuesday Dec. 01, 2009)
  Sonicsannounced that its Sonics Network for AMBA® Protocol (SNAP™) will offer SoC designers, free-of-charge, tools and IP for capturing and analyzing bus designs with the release of its new Web-based SNAP evaluation environment
  
  
• Actel Extends Core8051s Processor Support to Rtax, Axcelerator and IGLOO Families (Monday Nov. 30, 2009)
  Continuing to deliver solutions for embedded designers, Actel Corporation (NASDAQ: ACTL) today announced that it has extended Core8051s support for its line of high-reliability Axcelerator®, radiation-tolerant RTAX and low-power IGLOO® FPGAs.
  
  
• MoSys Announces Availability of Silicon Proven 40nm DDR3 and DDR3/2 Combo PHYs with Support for Datarates up to 2133 Mbps (Monday Nov. 30, 2009)
  MoSys today announced the availability of its silicon-proven DDR3 and DDR3/2 combo PHYs. MoSys’ fully-integrated solution complies with the latest DFI specification and provides the physical layer (PHY) interface between the controller logic and DDR3/2 DRAM devices.
  
  
• Synopsys Expands DesignWare Data Converter IP Portfolio with 40-nm Solutions (Tuesday Nov. 24, 2009)
  Synopsys today announced the release of a broad range of data converter IP solutions for 40-nanometer (nm) process technologies. The IP is targeted at broadband wireless communications, wired communications, and video designs requiring high-performance, ultra-low power consumption and very compact area.
  
  
• Imagination Technologies' to deliver production-ready IP for POWERVR SGX543MP multi-processor graphics (Tuesday Nov. 24, 2009)
  Imagination Technologies will begin shipping fully verified production quality IP for its POWERVR SGX543MP multiprocessor graphics cores to partners before the end of December 2009.
  
  
• Imagination reveals new META family of embedded SoC processors (Tuesday Nov. 24, 2009)
  Imagination Technologies announces the full roadmap for its Series2 generation of META processors, designed for the SoC-centric (System-on-Chip) age of silicon design.
  
  
• Imagination Technologies introduces "Connected Processor" IP cores (Tuesday Nov. 24, 2009)
  Imagination Technologies has created a new class of embedded Connected Processor™ solutions that will power the ‘Internet Everywhere’ generation of consumer electronics.
  
  
• Evatronix Announces ONFi 2.2 High-Speed Interface Support to its NAND Flash Memory Controller (Monday Nov. 23, 2009)
  Evatronix today announced its NAND Flash memory controller has been updated to meet the latest specifications of the Open NAND Flash interface (ONFi) and now fully supports the newest High Speed NAND Flash.
  
  
• Arasan Chip Systems' Redesigned USB 2.0 Hub IP enables Compound Devices to share USB Port (Monday Nov. 23, 2009)
  Arasan announced today the increased adoption of its redesigned USB 2.0 Hub Controller IP core in building compound USB devices. Arasan Chip Systems is a pioneering provider of USB IP with over a hundred licensees of its USB IP cores.
  
  
• DMP adds OpenGL ES 2.0 shader-based graphics IP to its new "SMAPH" graphics IP core family (Monday Nov. 23, 2009)
  Digital Media Professionals today announced "SMAPH-S", a next generation OpenGL ES 2.0 shader-based graphics IP core. DMP will start providing the core to initial customers in 1Q 2010.
  
  
• Virage Logic Introduces New Product for Post Silicon Bring Up and System Debug (Wednesday Nov. 18, 2009)
  Virage Logic today announced it has added a new member, STAR(TM) (self test and repair) Silicon Browser, to its flagship STAR(TM) Memory System product family.
  
  
• Imagination's POWERVR VXD390 adds key new functions to maximise system level performance (Wednesday Nov. 18, 2009)
  Imagination Technologies announces the latest member of its video decode IP core family, POWERVR VXD390: a low power, high performance, multi-standard and multi-stream high definition, hardware video decoder IP core that now also offers a broadcast quality video scaler, robust error and non-compliant stream handling capabilities, enhanced JPEG processing and optimisations for DDR3 memory support.
  
  
• Imagination Technologies announces revolutionary ENSIGMA UCCP320 (Wednesday Nov. 18, 2009)
  Imagination Technologies announces ENSIGMA UCCP320, which uniquely enables the broadest range of Wi-Fi connectivity, digital radio, mobile TV and TV standards of any communications and connectivity core.
  
  
• Imagination delivers latest HD video encoder IP core with full H.264 High Profile capability (Wednesday Nov. 18, 2009)
  Imagination Technologies announces POWERVR VXE380, the latest member of Imagination’s third generation video encoder IP family, which delivers multi-standard encoding of video, now including H.264 High Profile (HP), at HD resolutions.
  
  
• Rapid Bridge Tapes Out World's Smallest USB 2.0/3.0 PHY (Tuesday Nov. 17, 2009)
  Rapid Bridge announced today that it has taped out the world’s smallest USB 2.0/3.0 PHY. The USB 2.0/3.0 PHY is the newest member of Rapid Bridge’s LiquidPHY™ product family.
  
  
• Arasan Chip Systems First to Release SD/SDIO 3.0 Combo Device Controller IP (Monday Nov. 16, 2009)
  Arasan announced today the availability of the World's first Secure Digital SD/SDIO 3.0 Combo Device Controller IP. This combo IP is compliant with the latest SD, SDIO specification v3.0.
  
  
• Altera Delivers Industry's First Serial RapidIO 2.1 IP Solution (Monday Nov. 16, 2009)
  Altera today announced the immediate availability of the industry's first intellectual property (IP) core supporting the RapidIO® 2.1 specification. Altera's Serial RapidIO IP core supports up to four lanes at 5.0 GBaud per lane, addressing the increased bandwidth and reliability needs of the wireless and military markets.
  
  
• Actel Strengthens Fusion Mixed-Signal FPGA IP Offering for xTCA Platform Management Applications (Monday Nov. 16, 2009)
  Actel today announced IP core enhancements for hardware platform management applications. Developed in close collaboration with Pigeon Point Systems the new and improved cores further strengthen the suitability of Actel Fusion® mixed-signal FPGAs for platform management applications, and especially xTCA™ applications, for which Pigeon Point offers the market-dominant Board Management Reference (BMR) series.
  
  
• Tiempo demonstrates breakthrough performance for contactless secured applications, improving processing speed by a factor 6 (Monday Nov. 16, 2009)
  Tiempo is demonstrating at the “Cartes 2009” event how its asynchronous design technology can dramatically improve processing speed for contactless applications with, as an illustration, a live demo of a secured PayPass™ transaction in which processing speed on the card is six times faster than industry implementations, showing a complete transaction in less than 60 ms.
  
  
• Dolphin Integration complements its 130 nm catalog with a low voltage release of the ROM Cassiopeia (Friday Nov. 13, 2009)
  The patented Cassiopeia architecture for single via programmable ROM is enriched with a capability to operate from nominal voltage down to 1.1 V , both +/- 10%, in the TSMC 130 nm LP process.
  
  
• Posedge Annouces High Performance 10 Gbps IEEE 802.1AE (MACsec) IP Core (Thursday Nov. 12, 2009)
  Posedge has announced the availability of L2SEC Soft IP Core that performs full duplex 10 Gbps MAC layer Security fully conforming to IEEE 802.1AE standard.
  
  
• Arasan Chip Systems Releases ONFI 2.2 NAND Flash Controllers (Wednesday Nov. 11, 2009)
  Arasan announced the availability of NAND Flash Controllers supporting the newest Open NAND Flash Interface (ONFI) 2.2 specification.
  
  
• QualCore Logic successfully validated various Analog IP cores and Special IO's (Tuesday Nov. 10, 2009)
  QualCore Logic today announced that it successfully validated various Analog IP cores and Special IO's for US based company - the leading providers of high performance non-volatile solid state drives.
  
  
• Arteris Enhances Network-on-Chip Offerings to Address Full Range Of SoC Designs (Monday Nov. 09, 2009)
  Arteris today announced the availability of two new on-chip interconnect products, the FlexNoC and FlexWay packages. With these offerings, Arteris expands the capabilities of its market-leading NoC Solution to address the complete range of SoC design styles, sizes and complexities.