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IP / SOC Products News

• IPextreme to Sell and Support IP Portfolio from National Semiconductor including AMBA Peripheral Library and CR16 Processor (Tuesday Feb. 20, 2007)
  The initial offering shall include an extensive collection of commonly needed AMBA™ 2.0 peripherals and the well-established CompactRISC® CR16 processor.
  
  
• Arteris ships Arteris NoC Solution 1.6, lowers power requirements, improves flexibility, usability of Network-On-Chip (NoC) (Monday Feb. 19, 2007)
  The latest release of the IP library and accompanying tool set incorporates a range of customer-requested features to improve the efficiency and ease-of-use of implementing NoCs for multi-media, telecom infrastructure and wireless SoC designed in leading-edge manufacturing processes down to 45-nanometer (nm). Key to the release is a low-power version of the Arteris NoC IP library, aimed specifically at demanding wireless and consumer applications.
  
  
• ARC and BDTI Announce the Industry's First Certified H.264 Decoder Performance Benchmark Results (Monday Feb. 19, 2007)
  The ARC Video Subsystem requires as little as 160 MHz, with low power consumption and small die size, to decode a 1.5 megabits per second (Mbps) BDTI video stream at 30 frames per second (fps) for the H.264 Baseline Profile decoder at D1 resolution.
  
  
• Faraday Announces FPGACompanion ARM(TM) CPU Device (Friday Feb. 16, 2007)
  With an embedded ARM core and on-chip peripheral functions in the FC device, ASIC customers can use FC in system level SoC design verification together with customer logic implemented on FPGA devices. Faraday's FC has been sampled at several customer sites, with general availability starting immediately
  
  
• Hitachi and Renesas Technology Develop 1.5-V Low-Power, High-Speed Phase Change Memory Module for On-Chip Nonvolatile Memory Applications (Friday Feb. 16, 2007)
  Confirmation of 416-kbyte/sec Write Throughput and 20-Nanosecond Read Operations with a100-ìA Write Current Memory Cell
  
  
• Altera and TES Partner on FPGA-Based PCI Graphics Controller IP (Thursday Feb. 15, 2007)
  The TES Display Controller/Accelerated Vector Engine (D/AVE) PCI IP core allows systems designers to quickly integrate specific graphics functions such as high-quality thin film transistor (TFT) pixel rendering into all of Altera’s low-cost Cyclone© and high-end Stratix® series FPGAs.
  
  
• Synopsys' DesignWare IP for PCI Express Supports NXP Semiconductors' PXPIPE PHY Interface (Wednesday Feb. 14, 2007)
  Designers using the DesignWare IP for PCI Express in their System-on-Chip (SoC) designs with an external PHY now have an option to choose a proven, version 1.1-compliant solution based on either the PIPE PHY interface or NXP PXPIPE PHY interface standard.
  
  
• Synopsys IP for PCI Express 2.0 (Gen II) Passes PCI-SIG Compliance (Wednesday Feb. 14, 2007)
  The DesignWare digital controller IP for PCI Express 2.0 is fully compliant with the recently released PCI Express 2.0 specification and has successfully passed the latest PCI Express compliance testing at the PCI-SIG interoperability workshop held in the United States in December 2006.
  
  
• Elliptic Semiconductor Algorithms NIST Certified to FIPS140-2 (Tuesday Feb. 13, 2007)
  Elliptic designs and licenses cryptographic designs in semiconductor IP form which are licensed to Elliptic customers for integration into the integrated circuits. As such, Elliptic has received certification for its algorithms under CAVP.
  
  
• Hantro Demonstrates Ultra Low Power Video IP Products (Tuesday Feb. 13, 2007)
  Hantro demonstrates the latest ultra-low-power hardware video IP products at the 3GSM exhibition this week. Hantro’s 6280 and 7190 multi-format encoder and decode deliver High Definition (HD) 720p video compression capability for wireless devices.
  
  
• IP Cores, Inc. Announces an Ultracompact 3DES IP Core (Tuesday Feb. 13, 2007)
  IP Cores, Inc. announces an ultracompact IP core supporting the NIST FIPS 46-3 Data Encryption Standard (DES) and Triple DES (TDEA). Starting at 3K ASIC gates, DES1 core provides an efficient solution for an SoC designer.
  
  
• Rambus Unveils Low Power Initiative For Multi-Gbps Platforms (Monday Feb. 12, 2007)
  In its labs, Rambus demonstrated its low power technologies in a test transceiver that transferred more than 3,600 Terabits of data, the equivalent of the contents of nearly 100,000 standard-format DVDs, utilizing the power of only two standard AA batteries.
  
  
• ARM Builds Graphics Stack And Broadens Portfolio With Mali200 And Mali55 Processors (Monday Feb. 12, 2007)
  The ARM Mali200™ processor delivers visually stunning 3D graphics for next-generation mobile games on smartphones and other high-end portable devices. With an extraordinarily small footprint, the ARM Mali55™ processor brings rich 3D graphics capabilities to low-cost feature phones for the first time.
  
  
• IMEC realizes world's first digital UWB transmitter IC for IEEE 802.15.4a (Monday Feb. 12, 2007)
  IMEC's 90nm CMOS digital UWB transmitter is the first ever published IEEE 802.15.4a standard-compliant transmitter and outperforms state-of-the-art low-power narrowband transmitter implementations. The transmitter covers all the frequency bands of the standard up to 10GHz and is especially suited for application in low-power wireless sensor networks
  
  
• CEVA and Comsys Partner for Development of Multimode WiMAX Processors (Monday Feb. 12, 2007)
  Comsys leverage exceptional performance capabilities of CEVA-X1641 Quad-MAC DSP Core to develop flexible WiMAX baseband processor solution with configurable modem core addressing 4G evolution and mobile Internet convergence
  
  
• Imagination Technologies Demonstrates 'One Seg' on its Multi-Standard Mobile TV IP Platform at 3GSM (Monday Feb. 12, 2007)
  Imagination's mobile TV receiver technology is being shown receiving the three main mobile TV standards - DVB-H, T-DMB and, for the first time, 'One Seg' ISDB-T.
  
  
• Jetstream Media Technologies Announces Multi-Gigabit GCM CCM XTS Triple-Mode Security IP Core (Friday Feb. 09, 2007)
  Industry's first multi-gigabit GCM/CCM/XTS triple-mode security IP core that empowers SoC vendors to design high-performance robust security products.
  
  
• Denali and NXP Demonstrate Silicon-Proven and Fully Compliant PCI Express 1.1 Solution (Wednesday Feb. 07, 2007)
  Denali Software and NXP today announced that the Databahn™ PCI Express (PCIe) IP core and NXP PCIe PHY PX1011A provide customers a silicon-proven PCIe solution which is version 1.1 specification compliant.
  
  
• ARM and Northwest Logic Announce the Availability of Complete PCI-SIG Certified PCI Express ASIC Solution (Thursday Feb. 01, 2007)
  The silicon-proven ARM Velocity VSL210 PHY, a member of the ARM Velocity 200 PHY series, is fully compliant with the PCI Express Base 1.0a/1.1 specification with PIPE (PHY Interface for PCI Express) interface. Northwest Logic's PCI Express IP Cores are available in x1, x4 and x8 lane configurations. The cores are specifically designed for ease-of-use including built-in high-performance, multi-channel, on-demand DMA engine, simple user interface and a complete status port.
  
  
• Digital Blocks Announces the DB9000AVLN TFT LCD Controller IP Core (Wednesday Jan. 31, 2007)
  Specifically targeted for TFT LCD panels and the Altera NIOS II Avalon Bus, the DB9000AVLN is an out-of-the-box soft IP Core for display system designers.
  
  
• CAST Expands Memory Controller Line with IP Core for DDR2 SDRAM Devices (Tuesday Jan. 30, 2007)
  The new DDR2-SDRAM-CTRL IP core handles the interaction between SDRAM chips or DIMMs and the processor or a DMA in a system using that memory. The core significantly simplifies memory management challenges for the developer, implementing all the necessary data management, initialization, and address, and burst handling operations.
  
  
• CAST Introduces SOC Kernels, Combining Essential IP Cores and Software for Easier System Development (Tuesday Jan. 30, 2007)
  These Kernels combine multiple IP cores for basic system functions with boot code, drivers, and other underlying software in a pre-integrated, pre-verified package. This provides a significant head start for complex systems, and, together with the designer’s choice of 32-bit processor, is the quickest route to beginning actual hardware and software co-development.
  
  
• Synopsys Named IBM-Authorized Power Architecture Design Center; Synopsys to Directly License Foundry-Portable PowerPC Cores (Tuesday Jan. 30, 2007)
  As a newly authorized Power Architecture™ Design Center, Synopsys now offers sub-licenses that include the right for customers to manufacture system-on-chip (SoC) designs incorporating PowerPC cores at any foundry of their choosing. Synopsys now offers the IBM cores through its DesignWare® Star IP Program
  
  
• Virage Logic Launches Next Generation Embedded Non-Volatile Memory (Monday Jan. 29, 2007)
  NOVeA provides a multi-programmable embedded non-volatile memory which is key in applications requiring sophisticated security and digital rights management (DRM) capabilities such as Flash memory cards, DVD players and recorders, set-top boxes and RFID tags. This next generation NOVeA product delivers significant area and power reductions to better address advanced consumer and secure applications.
  
  
• Actel Champions Embedded Systems Designers With Broad Range of Industry-Standard Processor Solutions (Monday Jan. 29, 2007)
  Actel today introduced two free controller cores; the small, easy-to-use CoreABC and the configurable Core8051s. In addition to third-party tools and capabilities, Actel also offers a comprehensive development environment, boards and reference designs to support its processor offerings.
  
  
• YOGITECH Launches Industry First SIL3 Compliant IP For Safety-Critical Systems (Monday Jan. 29, 2007)
  fRMEM is available for SRAM connected to the system bus, for Tightly Coupled Memories, caches and for non volatile memories (Flashes, NAND Flashes and EEPROM). fRMEM is also designed to allow interoperability with external Built-In-Self-Test or Built-In-Self Repair modules
  
  
• Handshake Solutions launches Memory eXtension to clockless HT80C51 core (Monday Jan. 29, 2007)
  Low power and increased memory capabilities open up more advanced smart card applications for the familiar 8-bit 80C51 architecture
  
  
• VeriSilicon Launches New Families of Advanced Audio / Video Application Platforms to Accelerate Portable Multimedia Designs (Monday Jan. 29, 2007)
  VZ.Video family incorporating state-of-the-art, low-power video hardware requiring less than 66 MHz for D1 @ 30 fps decode or encode. VZ.Audio family enabling sub $1 MP3 ICs with the introduction of new products such as ZSP(R) 210 and USB 2.0 OTG
  
  
• Mixel Announces the Newest Members of Its SerDes IP Family, Quad 1.25Gbps/Channel LVDS Serializer and De-Serializer (Thursday Jan. 25, 2007)
  These LVDS SerDes IPs are new additions to Mixel’s existing family of SerDes products which includes 2nd generation, high performance, Giga-bit SerDes technology supporting a wide range of applications such as XAUI, SATA, PCI-Express, Fibre Channel, SONET-OIF, and backplane. Both IPs support 4-data channels and one clock channel and achieve 5Gbps throughput performance at low power consumption.
  
  
• Dolphin Integration announces a new stem of Standard Cells for extremely low leakage in TSMC 90LP (Thursday Jan. 25, 2007)
  Starting from 130 nm, the leakage current becomes very significant and increases exponentially at 90 nm and beyond, taking an increasing share of the overall power consumption of a System-on-Chip. Minimizing the leakage current thus is crucial, which ususally comes at the expense of integration density: The ''SESAME eLLvHD'' library of Standard Cells is optimized for extremely low leakage, while preserving high density: it enables to divide the leakage power by 100