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IP / SOC Products News

• TowerJazz and Dolphin Integration to offer Chip Developers a Complete Solution addressing the Low Power Requirements of the Fast Growing IoT Market (Monday May. 11, 2015)
  TowerJazz and Dolphin Integration today announced the signing of an MoU to provide a complete solution for customers developing devices such as sensors, meters and more for the emerging Internet-of-Things (IoT) market.
  
  
• DQ80251 from Digital Core Design is the World's Fastest 8051 CPU (Thursday May. 07, 2015)
  The DQ80251 mastered by Digital Core Design runs more than 75 times faster than the original 8051 chip, being the same the highest performance MCS51 instruction set compatible IP Core currently available. This fully configurable 80251 Microcontroller Core executes the MCS-51 and MCS-251 instruction sets and is delivered with great variety of integrated peripherals like USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC and Smart Card.
  
  
• Credo First to Demonstrate 28G SerDes on 16FinFET Plus Technology (Wednesday May. 06, 2015)
  Credo Semiconductor today announced it is the first company to deliver silicon-proven 28G NRZ SerDes IP on the TSMC 16-nanometer FinFET Plus (16FF+) process, and will demonstrate its high-performance, low power characteristics at the TSMC Symposium this week in Shanghai, China.
  
  
• Arasan Chip Systems Completes a Decade of Total Ethernet IP Solutions (Tuesday May. 05, 2015)
  Arasan introduced the 10/100 Ethernet MAC IP in 2006. The family now includes a complete spectrum of Ethernet MAC IP from “Fast” 10/100 Mbps to “XGMAC” 10Gbps, with options for IEEE 1588, and AVB.
  
  
• eMemory NeoFuse Technology Is Verified in 16nm FinFET Process (Tuesday May. 05, 2015)
  eMemory announced today that its One-Time Programmable (OTP) NeoFuse technology has been successfully verified in 16nm FinFET process, with full silicon intellectual property (Silicon IP) development and customer application deployment expected to be completed by the end of this year.
  
  
• Dolphin Integration enables to get the most competitive Power Management Network (Monday May. 04, 2015)
  In the same manner as for standard cell libraries, Dolphin Integration proposes the Reusable Power Kit Library (RPKL), a complete library of embedded voltage regulators structured per a standard, namely DELTA, resulting in reusable components for faster Time-to Market.
  
  
• Northwest Logic and S2C Deliver Validated MIPI Solution (Monday May. 04, 2015)
  Northwest Logic and S2C, Inc. announced today that Northwest Logic’s Mobile Industry Processor Interface (MIPI) Camera Serial Interface (CSI-2) Controller and Display Serial Interface (DSI) Controller have been fully validated on S2C’s FPGA Prototyping Platforms.
  
  
• Archband Introduces Low Power 100dB Audio & Voice CODEC IP (Monday May. 04, 2015)
  Archband today has announced its new generation low power, high performance, flexible and highly integrated stereo audio/voice CODEC IP "AR82S021". This silicon-proven IP delivers 100dB signal-to-noise (SNR) benchmark performance with compact silicon area in 40nmll logic process.
  
  
• RFEL adds Ultra-Low Latency Distortion Correction to its growing range of HD video enhancement solutions (Thursday Apr. 30, 2015)
  RFEL has enhanced its range of real-time, low latency, enhancement solutions for high frame rate, full colour HD video, by optimising its standard Distortion Correction solution to drastically reduce effective output latency to a few video lines, without compromising the IP core's existing high performance operating parameters.
  
  
• Creonic to Supply New LDPC Decoder and Encoder IP Cores for CCSDS Standard (Thursday Apr. 30, 2015)
  Creonic announced today the release of their new CCSDS LDPC encoder and decoder IP cores for the satellite and backhaul markets. The IP core complements the company's broadest product portfolio of LDPC IP cores in the world.
  
  
• Synopsys' New DesignWare Hybrid IP Prototyping Kits Accelerate IP Prototyping, Software Development and Integration (Tuesday Apr. 28, 2015)
  Synopsys today expanded its IP Accelerated initiative with support for ARM® processors with the new DesignWare® Hybrid IP Prototyping Kits. The kits enable designers to prototype the ARM processor and memory elements of a design in a virtual environment for superior debug visibility, and to develop software for the DesignWare interface IP in an FPGA-based environment for high-performance execution with real-world interface connectivity.
  
  
• Ultra-High Definition Video Encoding Now Feasible in Low-Cost FPGAs or Low-End ASICs (Tuesday Apr. 28, 2015)
  A new hardware encoder has the performance and efficiency needed to make 4K, 8K, or very high frame rate HD video output viable for low-volume or cost-sensitive products. This new Ultra-High Throughput (UHT™) JPEG Encoder IP Core available from semiconductor intellectual property provider CAST, Inc., is sourced from semiconductor IP company Alma Technologies.
  
  
• Shorter Time-To-Market thanks to the innovative SmartVision IDE from Dolphin Integration (Monday Apr. 27, 2015)
  Shorter Time-to-Market, optimized performance, easier debug: such requirements cannot be addressed with the only choice of silicon IPs. Providing a suitable development environment is primordial for meeting with such improvements and allowing SoC optimization.
  
  
• New Tensilica Fusion DSP Sets Low-Energy Benchmarks for IoT, Wearables and Wireless Connectivity (Wednesday Apr. 22, 2015)
  Cadence today announced the new Cadence® Tensilica® Fusion digital signal processor (DSP) based on the proven Xtensa® Customizable Processor. This scalable DSP is ideal for applications requiring merged controller plus DSP computation, ultra-low energy and a small footprint.
  
  
• Arteris Delivers FlexNoC Physical Interconnect IP to Accelerate SoC Layout (Wednesday Apr. 22, 2015)
  Arteris today announced availability of Arteris FlexNoC Physical interconnect IP, a breakthrough that accelerates system-on-chip (SoC) physical design.
  
  
• Athena and Rambus Cryptography Research Division Announce Solutions to Prevent Advanced Security Threats (Monday Apr. 20, 2015)
  Athena today introduced a comprehensive portfolio of IP cores with side-channel attack (SCA) countermeasures, based on advanced differential power analysis (DPA) countermeasure approaches pioneered by Rambus Cryptography Research Division.
  
  
• Comcores announces availability of an ETIS ORI 4.1.1 compliant CPRI IQ Compression IP Core enabling enhanced throughput or lowering of front-haul cost in wireless networks (Monday Apr. 20, 2015)
  Comcores CPRI IQ Compression/de-compression IP is a state-of-the-art compression solution that is compliant with ETSI ORI 4.1.1. It enables doubling of throughput on existing connections or cutting the cost for connectivity between baseband and radio in half by compressing data by a factor 2:1.
  
  
• Aims Technology releases Industry’s First Non-legacy AMBA5 CHI based High-performance Cache Coherent Network-on-Chip (NoC) IP for SoCs (Thursday Apr. 16, 2015)
  Aims Technology announced the release of its AimsConnect™ AMBA® 5 CHI (Coherent Hub Interface) protocol compliant Cache-coherent Network-on-chip (NoC) IP to enable next generation multiprocessor SoC market.
  
  
• Chips&Media releases world's first HEVC and VP9 multi-format decoder IP with 10bit support (Thursday Apr. 16, 2015)
  Chips&Media has introduced today its new multi decoder IP, WAVE412 which provides the industry’s first support for both HEVC (H.265) and WebM VP9 targeted for multimedia SoCs with 4K UHD capability.
  
  
• Imagination's Ensigma Whisper Cores: the industry's lowest power consumption connectivity IP for wearables and IoT (Wednesday Apr. 15, 2015)
  Imagination Technologies announces the first members of its Ensigma Whisper flexible connectivity IP family, designed specifically to enable the integration of ultra-low power communications in SoCs targeting wearables, IoT and other connected devices that require extended battery life and low cost points.
  
  
• Arasan Chip Systems Announces Availability of MIPI RFFE v2.0 IP (Tuesday Apr. 14, 2015)
  Arasan announced availability of its latest RFFE controller IP compliant with the recently updated MIPI RFFE standard v 2.0 released March 12, 2015.
  
  
• EnSilica launches eSi-3260 processor core with comprehensive SIMD DSP extensions targeting IoT sensing nodes and always-on applications (Tuesday Apr. 14, 2015)
  EnSilica has added to its family of eSi-RISC processor cores with the launch of the eSi-3260 targeted at IoT sensing nodes and always-on applications. The eSi-3260 combines advanced DSP functionality with the characteristic eSi-RISC small footprint and extremely low power consumption.
  
  
• Differentiate your SoC with the new MCU core from Dolphin Integration (Monday Apr. 13, 2015)
  Relying on 30 years of expertise in Virtual Components of Silicon IP, Dolphin Integration is proud to announce its new 32-bit microcontroller core derived from the hugely popular 80x51 family: Flip80351 Zephyr, associated with its innovative IDE, named SmartVision™, driving innovation for low-power and high-density solutions.
  
  
• Arteris Delivers FlexNoC Version 3 to Enhance System-on-Chip (SoC) IP Assembly (Wednesday Apr. 08, 2015)
  Arteris today announced availability of FlexNoC Version 3 (v3) interconnect fabric IP designed to help chip designers create more sophisticated chips, more quickly.
  
  
• Synopsys Announces Immediate Availability of Broad Portfolio of Silicon-Proven IP for TSMC 16-nm FinFET Plus Processes (Wednesday Apr. 08, 2015)
  Synopsys today announced the availability of a broad portfolio of DesignWare® PHY IP for TSMC's 16-nanometer (nm) FinFET Plus (16FF+) processes, enabling designers to integrate required functionality in mobile and enterprise system-on-chips (SoCs) with less risk.
  
  
• Barco Silex adds lightweight VC-2 compression to video production toolbox (Tuesday Apr. 07, 2015)
  Barco Silex announced that it will add VC-2 LD (SMPTE 2042) to its offering of high-quality hardware cores for video compression. VC-2 is a light compression codec especially suited to manage high-definition video production and storage. This new core will give video equipment OEMs a cost-effective and fast way to make their tools HD/UHD-proof.
  
  
• PLDA and GUC Delivers Fully Integrated PCI Express Gen 4 Solution for TSMC's 16nm FinFET Plus Process (Tuesday Apr. 07, 2015)
  PLDA has partnered with GUC to create the fully-integrated complete PCIe Gen 4 solution for TSMC’s 16nm FinFET Plus (16FF+) process. The new PCIe Gen 4 IP can be licensed immediately by system-on-a-chip (SoC) and system companies, enabling solutions that satisfy the throughput, latency and power demands of PCIe 4.0 applications.
  
  
• GUC Demonstrates Industry's First TSMC 16nm Low Leakage USB 3.1 PHY IP (Tuesday Apr. 07, 2015)
  Global Unichip Corp. (GUC) today announced industry's first low leakage USB 3.1 PHY IP developed for TSMC's 16-nanometer FinFET+ process. The new IP will be available on June 15.
  
  
• Dolphin Integration addresses the real memory challenges of LCD Display Drivers in advanced nodes (Monday Apr. 06, 2015)
  The TSMC 55nm HV process provides an efficient infrastructure to design cost-effective and low-power display drivers. Based on this technology, Dolphin Integration continues to strengthen its leading position by providing a new SRAM architecture specially designed to meet the requirements of the steadily expanding display driver market for high-resolution mobile handsets.
  
  
• True Circuits Announces New Line of PLLs, the "Ultra PLL", that offers exceptional performance, features and ease of use (Monday Apr. 06, 2015)
  Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) for the semiconductor, systems and electronics industries announced today the availability of a new line of Phase-Locked Loop (PLL) hard macros that is well suited for the most demanding chip applications, including high-speed SerDes and ADC input clocks.