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IP / SOC Products News

• Cadence Announces Industry's First Multi-Protocol DDR4 and LPDDR4 IP Solution (Thursday Oct. 16, 2014)
  The Cadence® DDR controller and PHY IP can scale up to 3200Mbps, which provides flexibility for designers to easily take advantage of higher performance DDR4 and LPDDR4 DRAMs when they become available, without having to redesign their systems on chip (SoCs).
  
  
• New DesignWare ARC HS38 Processor Doubles Performance for Embedded Linux Applications (Tuesday Oct. 14, 2014)
  Synopsys today announced availability of the DesignWare® ARC® HS38 Processor, the latest addition to the ARC HS Family of high-speed processor IP cores. A single HS38 processor delivers up to 4200 DMIPS at speeds up to 2.2 GHz in typical 28-nanometer (nm) silicon, more than twice the performance of previous generation ARC 770D cores supporting Linux.
  
  
• IPrium releases PSK Demodulator (Tuesday Oct. 14, 2014)
  IPrium LLC today announced that it has expanded its family of Demodulator IP products with a new PSK Demodulator IP Core for satellite systems. The PSK Demodulator IP Core has been silicon-proven using multiple development boards and is compliant with standards for satellite transmission.
  
  
• eASIC and Comcores Announce Support for C-RAN with CPRI v6.0 (Monday Oct. 13, 2014)
  eASIC and Comcores today announced immediate support for Common Public Radio Interface (CPRI) v.6.0 using eASIC’s Nextreme-3 28 nm devices enabling energy efficient and high-performance wireless C-RAN solutions.
  
  
• Cadence Offers Industry' First MIPI SoundWire Controller IP Solution (Thursday Oct. 09, 2014)
  Cadence today announced the industry’s first MIPI® SoundWireSM Controller Intellectual Property (IP). SoundWire is a new digital audio interface specification from the MIPI Alliance that enables bi-directional digital communication with a focus on low complexity and low gate count, making it attractive to many mobile design applications.
  
  
• Cortus Launches Optimized Low-Power Processor for Multi-Core Implementations in Connected Devices (Tuesday Oct. 07, 2014)
  
  
  
• Cortus Targets Sensors, Wearables and other IoT Applications With New Low Power Embedded 32-bit Processor Core (Tuesday Oct. 07, 2014)
  Cortus announced the first of a new family of products based on its v2 instruction set today. The APS23 core was built to deliver a new level of efficiency, ease of integration and cost of ownership for low-power, connected intelligent devices.
  
  
• RFEL adds new Wideband DDC to its signal processing range (Monday Oct. 06, 2014)
  RFEL has announced the latest addition to its range of award winning FPGA based signal processing solutions. The flexible Wideband Digital Down-Converter (Wideband DDC) IP core is designed to accept wideband digitised data at sample rates of up to 3.6GS/s, supporting first or second Nyquist bandwidths of up to 1.8GHz.
  
  
• ARM and TSMC unveil roadmap for 64-bit ARM-based processors on 10FinFET process technology (Thursday Oct. 02, 2014)
  ARM® and TSMC today announced a new multi-year agreement that will deliver ARMv8-A processor IP optimised for TSMC 10FinFET process technology. Because of the success in scaling from 20SoC to 16FinFET, ARM and TSMC have decided to collaborate again for 10FinFET.
  
  
• New ARM Implementation Solutions Reduce Time to Market for FinFET Designs (Wednesday Oct. 01, 2014)
  ARM® today announced the introduction of two new physical IP implementation solutions for its silicon partners to help simplify the path to implementation for their FinFET physical designs. ARM Artisan® Power Grid Architect will reduce overall design time by creating optimal SoC power grid layouts while ARM Artisan Signoff Architect increases accuracy and precision in managing on-chip variation over existing methodologies.
  
  
• D68HC11K with applications notes, development board & tools from Digital Core Design (Wednesday Oct. 01, 2014)
  Digital Core Design has introduced the D68HC11K, which is a synthesizable soft IP Core Microcontroller, fully compatible with the Motorola MC68HC11K industry standard. It can be used as a direct replacement for the microcontrollers like: MC68HC11K0, MC68HC11K1, MC68HC11K4, MC68HC711K4, MC68HC11KS2 and MC68HC711KS2.
  
  
• Rambus Cryptography Research Division Launches Suite of DPA Resistant Cores Addressing the Continuing Rise in Data Theft (Wednesday Oct. 01, 2014)
  Rambus today announced that its Cryptography Research division has introduced a family of differential power analysis (DPA) resistant cryptographic cores. As part of Rambus’ overall IP cores program, these ready-to-use IP cores offer chipmakers an easy-to-integrate security solution with built-in side channel resistance for cryptographic functions across a wide range of connected devices.
  
  
• Arteris FlexNoC Resilience Package Enhances Redundancy, Fault Tolerance for Mission Critical Systems-on-Chip (Tuesday Sep. 30, 2014)
  Arteris today announced the new FlexNoC Resilience Package designed to increase reliability and lower the cost of developing resilient and fault tolerant systems-on-chip (SoCs). The FlexNoC Resilience Package enhances the benefits of Arteris FlexNoC network-on-chip fabric IP to automotive, aerospace defense, industrial equipment and other electronics markets requiring fault tolerance.
  
  
• TSMC and ARM set new benchmarks for performance and power efficiency with first announced FinFET silicon with 64-bit ARM big.LITTLE technology (Tuesday Sep. 30, 2014)
  TSMC and ARM® today announced the results from a key FinFET silicon validation of the ARM big.LITTLETM implementation, using ARM Cortex®-A57 and Cortex-A53 processors on TSMC’s advanced 16nm FinFET (16FF) process technology.
  
  
• Silicon-Proven Mixed Signal IP Products on 16nm FinFET (Tuesday Sep. 30, 2014)
  Analog Bits today disclosed working test-chips based upon their new Mixed Signal Design Kits on TSMC’s latest 16nm FinFET process.
  
  
• Cadence IP Portfolio and Tools to Support New TSMC Ultra-Low Power Technology Platform (Monday Sep. 29, 2014)
  Cadence today announced that the company is supporting TSMC’s new ultra-low power (ULP) technology platform with its extensive IP portfolio and suite of digital and custom/analog tools.
  
  
• Cadence Unveils Broad IP Portfolio for New TSMC 16nm FinFET Plus Process (Monday Sep. 29, 2014)
  Cadence today announced a broad portfolio of intellectual property (IP) for TSMC’s 16nm FinFET Plus (16FF+) process. Currently under development for the 16 FF+ process, the Cadence IP portfolio includes multiple high-speed protocols for several key memory, storage and interconnect standards critical in the development of advanced SoC designs.
  
  
• Are you ready to conquer PCIe 4.0 challenge? PLDA is ready (Thursday Sep. 25, 2014)
  PLDA has optimized its ASIC intellectual property (IP) cores for the next generation of the ubiquitous and general purpose PCI Express® I/O specification, 4.0. PLDA’s proven 3.0 architecture enables easy migration to PCIe 4.0, with no interface changes necessary, and preserves existing behavior for seamless integration.
  
  
• GUC Rolls Out New Low Power Solid State Drive IP Portfolio (Thursday Sep. 25, 2014)
  Global Unichip today rolled out an expanded interconnect low power IP portfolio for ASICs targeting solid state drive (SSD) applications. The expansion covers ultra low power PCIe 3/4 PHY, DDR3/4, LPDDR3/4 CTRL/PHY and ONFi4.0 IO/PHY.
  
  
• ARM Supercharges MCU Market with High Performance Cortex-M7 Processor (Wednesday Sep. 24, 2014)
  ARM has unveiled a new 32-bit Cortex-M processor that delivers double the compute and digital signal processing (DSP) capability of today's most powerful ARM-based MCUs.
  
  
• Coreworks develops audio IP core for integration in SoC and FPGA for 8K UHDTV encoding (Tuesday Sep. 23, 2014)
  Coreworks together with its representative in Japan, Spinnaker Systems Inc., announce that Coreworks has now completed the development of an audio encoding system to support multiple audio formats and multiple audio streams for the next generation of UHDTV, known as 8K UHDTV.
  
  
• Broadcom Enables Industry's First 20 nm 100G Coherent PHY (Monday Sep. 22, 2014)
  Broadcom today announced that its high performance 20 nanometer (nm) signal processing enhanced mixed signal technologies has enabled NTT Electronics' new NLD0640 100G coherent digital signal processor (DSP) — an industry first.
  
  
• Synopsys' New DesignWare MIPI D-PHY Cuts Area and Power by 50 Percent (Wednesday Sep. 17, 2014)
  Synopsys today announced that it has cut the area and power consumption of its DesignWare® MIPI® D-PHY™ by 50 percent compared to competitive solutions while increasing performance to 2.5 Gbps per lane, reducing system-on-chip (SoC) silicon cost and extending battery life for mobile, consumer and automotive applications.
  
  
• Open-Silicon Speeds and Simplifies ASIC Development For 100G Networks (Tuesday Sep. 16, 2014)
  Open-Silicon today announced a 28Gbps Serializer/Deserializer (SerDes) evaluation platform for ASIC development that will enable the rapid deployment of chips and systems for 100G networks. The platform includes a full board with packaged 28nm test chip, software and characterization data.
  
  
• Semtech Provides Ultra-High Speed ADC and DAC for Advanced Digital Microwave Systems (Tuesday Sep. 16, 2014)
  Semtech today announced that 64GSPS ADC and DAC cores are available utilizing IBM's 32nm SOI technology for integration in high performance Digital Microwave System on Chip (SoC) solutions.
  
  
• MagnaChip to Offer 0.13um Embedded EEPROM IP (Monday Sep. 15, 2014)
  MagnaChip today announced that it has finished development of a proprietary 0.13um embedded EEPROM IP which is suited for use in non-volatile memory (NVM) solutions such as touch controller IC and microcontroller (MCU) applications.
  
  
• Allegro DVT showcases its HEVC/H.265 Video Encoder IP at IBC 2014. (Tuesday Sep. 09, 2014)
  At IBC 2014, Allegro DVT will perform a live demonstration of its HEVC/H.265 encoder IP core. The demonstration will be conducted on a prototyping platform, demonstrating the features and video quality of our HEVC/H.265 encoder IP.
  
  
• Credo Announces First 56G SerDes Technology Based on Conventional NRZ Modulation (Tuesday Sep. 09, 2014)
  Credo Semiconductor today announced the industry's first SerDes transceiver technology that can deliver speeds up to 57.5Gbps using NRZ signaling. Credo was able to clock its device at 57.5 Gbps, achieving 50 Gbps speeds across a channel with more than 30 dB loss at Nyquist frequency.
  
  
• Xilinx, Northwest Logic and Xylon Provide Low Cost FPGA-based MIPI Interfaces for Video Displays and Cameras (Monday Sep. 08, 2014)
  Xilinx and Northwest Logic and Xylon, Xilinx Premier Alliance Members, announce the availability of a low cost Xilinx FPGA-based MIPI interface IP that is optimized for cost sensitive video displays and cameras.
  
  
• Sidense Demonstrates Working One-Time Programmable (OTP) Bit Cells in TSMC 16nm FinFET Technology (Thursday Sep. 04, 2014)
  Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it successfully demonstrated read and write capability for its 1T-OTP bit-cell architecture on test silicon fabricated in a 16nm CMOS FinFET process.