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IP / SOC Products Articles

• eNVM towards 40nm and beyond (Aug. 30, 2021)
  As the semiconductor industry is prominently marching into the nanometer era, fundamental elements face their physical limits significantly, such as electric field across gate dielectric layers, leakage from an ultra-short channel or steep doping profile, newly incorporated leakage/current models, etc.
  
  
• The Elements of Traceability (Aug. 02, 2021)
  Europe is an interesting place to observe complex systems’ development activity. It may not have hyperscalers or smartphone leaders, but on the world stage, it has one of the two dominant commercial aircraft manufacturers, an active space agency, several premium car brands and leading Tier 1s with supporting automotive semiconductor companies.
  
  
• TOPS: The Truth Behind a Deep Learning Lie (Jul. 01, 2021)
  AI companies generally home in on one criterion: more tera operations per second (TOPS). Unfortunately, when silicon manufacturers promote their TOPS metrics, they are not really providing accurate guidance. In most cases, the numbers being hyped aren’t real TOPS, but peak TOPS.
  
  
• The network-on-chip interconnect is the SoC (Jun. 24, 2021)
  Functions in an SoC communicating with each other through an interconnect architecture is not so different from a network.
  
  
• The Markets and Applications for eFPGA (Jun. 14, 2021)
  Andy Jaros of Flex Logix discusses how embedded FPGA has grown from a technology pushed into the market into something that satisfies multiple application sectors and how technical development, not yet ended, will be increasingly customer-driven.
  
  
• How eNVM Helps Power Controllers Be Smarter (Jun. 14, 2021)
  PMIC designers have learned that using eNVMs like OTP in their chips can be very beneficial. A simple state machine with OTP can store power sequences and parameters, which can help manage the power between ICs efficiently.
  
  
• A comparison of SRAM vs quantum-derived semiconductor PUFs (Jun. 07, 2021)
  This article explores the relative performance of SRAM PUF and quantum-derived semiconductor PUF technologies for IoT security.
  
  
• The common silicon issues in analog IP integration (Jun. 03, 2021)
  Despite the fears of the last decade that Moore’s Law had finally reached its end, the microelectronics sector has continued to adapt to new physical constraints and product requirements through sustained innovation and creativity. A major portion of that creative energy has gone into the development of analog, RF and mixed-signal blocks as embeddable IP.
  
  
• The Expanding Markets for Edge AI Inference (Jun. 01, 2021)
  The ability to do AI inferencing closer to the end user is opening up a whole new world of markets and applications. In fact, IDC just reported that the market for AI software, hardware, and services is expected to break the $500 billion mark by 2024, with a five-year compound annual growth rate (CAGR) of 17.5% and total revenues reaching an impressive $554.3 billion.
  
  
• The realities of developing embedded neural networks (May. 31, 2021)
  Much has been written about using AI for increasingly smart vehicles. But how do you take a neural network (NN) developed on a server farm and squeeze it into resource-constrained embedded hardware in production cars?
  
  
• MIPI Drives Performance for Next-Generation Displays (May. 17, 2021)
  In this white paper, we will explore the history of MIPI display technology, (DSI and DSI-2), MIPI display markets, and the emerging bandwidth gap given the performance requirements of next- generation displays.
  
  
• Delivering timing accuracy in 5G networks (May. 10, 2021)
  How IEEE 1588 PTP has evolved to meet the stringent time synchronization requirements of 5G
  
  
• Vital Ways to Prevent a Cyberattack (May. 05, 2021)
  In mid-December last year, SolarWinds, a company specializing in IT management solutions, was at the center of a software supply chain attack. Not only did attackers damage SolarWinds’ software development environment and code signing infrastructure, but they also implanted malicious backdoors around the world
  
  
• Paving the way for the next generation audio codec for TRUE Wireless Stereo (TWS) applications - PART 4 : Achieving the ultimate audio experience (May. 03, 2021)
  In this fourth part of Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications whitepaper, the pure audio performance will be discussed.
  
  
• A short primer on instruction set architecture (Apr. 19, 2021)
  In computer science, an instruction set architecture (ISA) is an abstract model of a computer. It’s also referred to as architecture or computer architecture. Moreover, a central processing unit (CPU), a venue of realization of an ISA, is called an implementation.
  
  
• Building security into an AI SoC using CPU features with extensions (Apr. 12, 2021)
  With the rapid deployment of artificial intelligence (AI), the focus of AI system on chip (SoC) design has been on building smarter, faster and cheaper
  
  
• CAVP - NIST ACVTS - Are you still with me? (Apr. 01, 2021)
  How “Acronym Soup” Serves Up Big Security Advantages.
  
  
• Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 3 : Optimizing latency key factor (Mar. 29, 2021)
  In this third part of Paving the way for the next generation audio codec for the True Wireless Stereo (TWS) applications whitepaper, the latency performance and how it impacts the ANC performance will be detailed.
  
  
• Basics of SRAM PUF and how to deploy it for IoT security (Mar. 25, 2021)
  This article covers the basics of what an SRAM PUF (physical unclonable function) is and how it works, as well as the functionality it offers in internet of things (IoT) security as the trust anchor for any device.
  
  
• Colibri, the codec for perfect quality and fast distribution of professional AV over IP (Mar. 18, 2021)
  When you look to transition your AV distribution from dedicated cabling to IP networks, one of the considerations is quality. How much of the quality of your rich visual communication has to be sacrificed in order to run it over 1Gbit Ethernet cables?
  
  
• Increasing bandwidth to 128 GB/s with a tailored PCIe 6.0 IP Controller (Mar. 16, 2021)
  While the PCIe 6.0 specification is expected to be finalized and released later in 2021, PLDA has been hard at work to address the needs of early adopters looking for the most advanced PCIe 6.0 IP solution for their SoCs and ASICs.
  
  
• A RISC-V ISA Extension For Ultra-Low Power IoT Wireless Signal Processing (Mar. 15, 2021)
  This work presents an instruction-set extension to the open-source RISC-V ISA (RV32IM) dedicated to ultra-low power (ULP) software-defined wireless IoT transceivers.
  
  
• Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 2 : Increasing play time (Mar. 15, 2021)
  In this second part of Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications whitepaper, energy efficiency will be discussed and several means to achieve extra-long playtime will be exposed.
  
  
• How MIPI Alliance specs enable the IIoT (Mar. 08, 2021)
  This article explains how MIPI specifications, which are widely implemented within billions of mobile devices, can be leveraged by developers to create successful device designs, drive down development efforts and reduce costs across a number of IIoT applications.
  
  
• Standardized PUF-based Solution for Device eID (Mar. 08, 2021)
  In this column, after a background introduction, we will first discuss IEEE 802.1AR standard on secure device identity. Next, we’ll assert PUF is an enabling solution for the device eID. Third, we will discuss PUF related international standards. Fourth, we will present a short tutorial on PUFiot. Fifth, we will assert that PUFiot is an ideal Device eID with wide applications. Finally, we will draw a conclusion on the future trend of Device eID development.
  
  
• Paving the way for the next generation audio codec for the True Wireless Stereo (TWS) applications - PART 1 : TWS challenges explained (Mar. 01, 2021)
  The audio market for wireless Bluetooth headsets is growing rapidly. Audio devices using Bluetooth (BT) connectivity are more ubiquitous than ever. People have gotten used to wireless audio systems, and the mobile phone industry is pushing towards a world without audio connectors and cables. The latest trend in wireless headsets and speakers is True Wireless Stereo systems (TWS), consisting of two independent units that are each charged in their own charging case.
  
  
• Licensing Interconnect IP for Fun & Profit (Feb. 25, 2021)
  “Build or buy” is an age-old question. But here’s another one: Why do you even license IP? Nobody builds their own Mercedes-Benz from scratch. Even if you’re a third-generation, dyed-in-the-wool automotive engineer from Stuttgart, you still won’t build your car. You buy it.
  
  
• Specifying a PLL Part 3: Jitter Budgeting for Synthesis (Feb. 22, 2021)
  This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to calculate a jitter budget when specifying a digital system. This white paper explains how jitter changes the period of a clock and how to ensure that jitter has correctly been accounted for in the calculations for timing closure.
  
  
• Consider ASICs for implementing functional safety in battery-powered home appliances (Feb. 18, 2021)
  This article looks at how functional safety can be applied in home appliances, and examines the economic tipping point of taking an ASIC vs. discrete component route to do so.
  
  
• Enabling AI Vision at the Edge (Feb. 17, 2021)
  Computer vision has made tremendous advances in the last several years due to the proliferation of AI technology. The intersection of big data and massive parallel computing changed the way in which machines are programmed to understand unstructured 2D and 3D data, such as video feeds from cameras.