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FPGA / CPLD News

• SiliconBlue Enables Differentiated Mobile Broadband Products with New P-Series mobileFPGA Devices (Monday Feb. 15, 2010)
  SiliconBlue today announced their new iCE65ä P-Series mobileFPGAä devices. The P-Series devices extend the iCE65 family architecture by adding performance enhancements such as 30% faster I/O, PLLs (phase-locked loops) and by offering over 12,000 logic cells.
  
  
• Altera Unveils Innovations for 28-nm FPGAs (Monday Feb. 01, 2010)
  Altera announced today new innovations that will be incorporated into upcoming 28-nm FPGAs. Embedded HardCopy® Blocks, a new method for partial reconfiguration and embedded 28-Gbps transceivers will dramatically improve the density and I/O performance of next-generation Altera® FPGAs and further strengthen their competitive position versus ASICs and ASSPs.
  
  
• ASIC pioneer reinvents 3-D FPGAs (Friday Jan. 29, 2010)
  By building a three-dimensional field-programmable FPGA with an ultra-dense anti-fuse interconnect, NuPGA claims to be able to achieve the density of an ASIC at a fraction of the cost.
  
  
• Actel Announces Compliance with Quality Management Standards SAE/AS9100 and ISO 9001 (Wednesday Jan. 27, 2010)
  Actel today announced it has established ongoing compliance with both the rigorous SAE/AS9100 Aerospace Certification and the prestigious ISO 9001:2000 quality standards.
  
  
• Actel's Low-Power FPGAs Take to the Sky With Boeing's 787 Dreamliner (Wednesday Jan. 20, 2010)
  Actel today announced that its low-power ProASIC®3 and ProASIC PLUS® FPGA families have been designed into flight-critical applications on the new Boeing 787 Dreamliner commercial airliner.
  
  
• Xilinx Virtex-6 FPGA Family Achieves Full Production Qualification on UMC's High-Performance 40nm (Wednesday Jan. 20, 2010)
  UMC and Xilinx today announced they have fully qualified the Virtex(R)-6 FPGA family on the foundry's high- performance 40nm logic process. The full qualification of the Virtex-6 family signifies the transition to 40nm volume production following UMC's first shipments of the devices in March 2009.
  
  
• Industry's Biggest, Highest Performance FPGA Now Shipping from Xilinx (Tuesday Jan. 12, 2010)
  Xilinx today announced the first shipments and availability of its Virtex(R)-6 LX760 device. As the industry's largest FPGA available for delivery with immediate design tool support, the Virtex-6 LX760 device enables Xilinx customers who need raw logic density and industry-leading I/O performance to get started on their projects today using the Xilinx ISE(R) Design Suite 11.4.
  
  
• Xilinx Expands Programmable Advantage for Consumer Digital TV Displays (Thursday Jan. 07, 2010)
  Xilinx introduces the first market-specific Targeted Design Platform optimized for creating state-of-the-art digital television (DTV) solutions with the Spartan-6 FPGA family. The Xilinx Consumer DTV Targeted Design Platform streamlines development of advanced video algorithms with the latest video interface standards, including DisplayPort, V-by-One(R)HS, HDMI, and LVDS.
  
  
• SiliconBlue Technologies Expands iCE65 mobileFPGA Family (Tuesday Jan. 05, 2010)
  SiliconBlue® Technologies, the leader in ultra-low power, single-chip SRAM FPGAs, today announced that it has expanded its iCE65™ mobileFPGA™ family with the iCE65L01 device.
  
  
• Lattice Releases Development Platform for SERDES and Video Clock Distribution (Monday Dec. 14, 2009)
  Lattice today announced the immediate availability of a $169 evaluation board for the ispClock(TM) 5400D programmable clock device. The new board is an easy-to-use platform for evaluating and designing with the ispClock5400D differential clock distribution device.
  
  
• New Xilinx Virtex-6 and Spartan-6 FPGA Connectivity Development Kits Include Northwest Logic DMA Engine IP (Wednesday Dec. 09, 2009)
  Xilinx today announced the availability of the new Xilinx® Virtex®-6 and Spartan®-6 FPGA Connectivity Development Kits that provide a comprehensive, easy-to-use, and hardware validated development environment. A key component of the new kits is the Connectivity Targeted Reference Designs that contain Northwest Logic's high-performance, scatter-gather DMA Engine IP.
  
  
• New Xilinx Connectivity, Embedded, and DSP Kits Enable Increased Productivity and Innovation for System-on-Chip Designs (Tuesday Dec. 08, 2009)
  Xilinx, Inc. today announced six new development kits as part of its Targeted Design Platforms for enabling developers to focus on innovation and differentiation when designing with FPGAs.
  
  
• Altera Ships Stratix IV E FPGA Development Kit Featuring a 530K Logic Element FPGA (Tuesday Dec. 08, 2009)
  Altera today announced the availability of its latest development kit targeting Stratix® IV FPGAs. The Stratix IV E FPGA Development Kit features the industry's highest density, highest performance FPGA available.
  
  
• Altera's Stratix IV FPGAs to Power XDI's dbX Analytics Appliance (Thursday Dec. 03, 2009)
  Altera today announced its high-performance Stratix® IV FPGAs have been designed into XtremeData Inc.'s next-generation dbX family of database appliances designed specifically for the unconstrained analysis and exploration of large databases.
  
  
• SiliconBlue Technologies is the First New FPGA Company to Ship in Production Volume in 20 Years (Tuesday Dec. 01, 2009)
  SiliconBlue® Technologies today announced that it has shipped production-volume quantities of its iCE65™ mobileFPGA™ devices to more than 10 customers. This makes SiliconBlue Technologies the first new programmable logic solutions company in over 20 years to achieve this milestone.
  
  
• Lattice Ships 25 Millionth MachXO Programmable Logic Device (Monday Nov. 30, 2009)
  Lattice today announced that it has shipped over 25 million MachXO(TM) PLDs. Broadly adopted in a wide range of high volume, cost sensitive applications, customers worldwide are using the MachXO PLD family due to its unparalleled ease-of-use, flexibility, system integration and price.
  
  
• Lattice Announces First Low Cost FPGA With Serial RapidIO 2.1 Support (Monday Nov. 23, 2009)
  Lattice Semiconductor and Praesum Communications today announced the availability of the Serial RapidIO 2.1 endpoint soft IP core for the LatticeECP3(TM) FPGA family. The core supports 1x, 2x and 4x lane configurations at up to 3.125Gbps lane speeds, offering the lowest cost, lowest power programmable SRIO solution in the industry.
  
  
• Actel Expands RTAX-DSP FPGAs with New Configurable DSP IP Cores (Wednesday Nov. 18, 2009)
  Actel today announced several highly configurable DSP IP cores expanding the design creation capabilities for the RTAX2000D and RTAX4000D DSP FPGAs. The new cores enable designers to easily create common DSP functions such as filters (FIR, IIR) and transforms (FFT, IFT, DCT).
  
  
• Xilinx Simplifies Serial Digital Interface Development for High Performance Professional Broadcast Audio and Video Systems (Wednesday Nov. 18, 2009)
  Xilinx today introduced the industry's first Broadcast Connectivity Targeted Design Platform with Xilinx® Virtex®-6 FPGAs to simplify development of serial digital interface (SDI) solutions for high-performance broadcast audio and video systems.
  
  
• Xilinx's New EasyPath-6 FPGAs Deliver Fast, Simple, Risk-Free Cost Reduction for High-Performance Virtex-6 FPGAs in Just Six Weeks (Monday Nov. 16, 2009)
  EasyPath-6 FPGAs Deliver the Lowest Total Product Cost for 40-nm FPGAs in the Shortest Time with No Risk and Complete Support for all FPGA Features
  
  
• Lattice Announces Production Release of Highest Density LatticeECP3 FPGA (Monday Nov. 16, 2009)
  Lattice Semiconductor today announced that the LatticeECP3™-150 FPGA, the highest-density device in its award-winning high-value, low-power ECP3 mid-range FPGA family, has been fully qualified and released to volume production.
  
  
• New Lattice FPGA Design Tool Suite Includes Advanced Support for High Performance DDR Interfaces (Tuesday Nov. 10, 2009)
  Lattice Semiconductor today announced Version 8.0 of its ispLEVER(R) FPGA design tool suite, which includes many enhancements for the design of high speed double data rate (DDR) interfaces for the LatticeECP3(TM) FPGA family.
  
  
• Xilinx Improves Transceiver Simulation Time 100x With Release of Industry's First IBIS-AMI FPGA Transceiver Models (Tuesday Nov. 10, 2009)
  Xilinx, Inc. (Nasdaq: XLNX) today announced the availability of the industry's first IBIS-AMI models for FPGA transceivers. Xilinx is the first FPGA provider and among the first silicon vendors to release IBIS-AMI models for its transceiver technology that will enable designers to reduce simulation time from hours to minutes.
  
  
• Altera's New Cyclone IV FPGA Expands Reach of Cyclone FPGA Series (Monday Nov. 02, 2009)
  Expanding on the success of the Cyclone® FPGA series and extending its transceiver leadership, Altera today announced the new Cyclone IV FPGA family.
  
  
• Xilinx FPGAs Contribute to Global Standardization of Cryptographic Module Security Evaluation (Thursday Oct. 29, 2009)
  National Institute of Advanced Industrial Science and Technology, Japan Uses Virtex-5 and Spartan-3A FPGAs in its Newest Cryptographic Evaluation and Partial Reconfiguration Systems
  
  
• Lattice and Affarii Deliver Low Power, Low Cost RRH Solution (Monday Oct. 26, 2009)
  Lattice and Affarii today announced that they have developed a complete 3G/4G-based Remote Radio Head (RRH) solution for wireless infrastructure customers.
  
  
• Altera Starts Production Shipments of the Industry's First FPGAs with Integrated 11.3-Gbps Transceivers (Wednesday Oct. 21, 2009)
  Altera today announced it has started shipping in production its Stratix® IV GT EP4S100G2 FPGA, the industry's first FPGA featuring integrated 11.3-Gbps transceivers. Stratix IV GT FPGAs are the only single-chip devices available today that meet the high-speed bandwidth requirements for next-generation framer, MAC, bridging and switching applications for 100-Gigabit Ethernet (GbE) and 100-Gigabit Optical Transport Networks (OTN).
  
  
• Lattice Simplifies System Control Applications With MachXO Control Development Kit (Monday Oct. 19, 2009)
  Lattice today announced the immediate availability of the new MachXO(TM) Control Development Kit as well as 12 new reference designs, ideal for prototyping system control functions such as temperature and current monitoring, power supply sequencing, fan control and fault logging, that are commonly found in telecom infrastructure, server, industrial and medical applications.
  
  
• Altera Secures Your Design With Cyclone III LS FPGA Development Kit (Monday Oct. 19, 2009)
  Altera today announced availability of the Cyclone® III LS FPGA Development Kit. The kit features hardware and software solutions that allow customers to prototype and test designs for Altera's Cyclone III LS FPGAs, the lowest power FPGAs at less than 0.25W of static power for 200K logic elements (LEs).
  
  
• Altera Maximizes Its CPLDs by Enhancing the MAX II Family (Monday Oct. 12, 2009)
  Altera today announced it is enhancing its MAX II® CPLD family by offering industrial-grade temperature ranges and lowering the power of its MAX IIZ devices.