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FPGA / CPLD News

• Actel Provides Path to the Future for Military and Aerospace Community With Broad Hi-Rel Product Roadmap (Tuesday Sep. 06, 2005)
  Company Plans Include the First Flash-Based FPGA for Space and Extensions to Its Industry-Leading, Antifuse-Based RTAX-S Family
  
  
• RAD Data Communications Chooses LatticeEC FPGA and ispMACH 4000 CPLD for its Optimux Multiplexer (Tuesday Aug. 30, 2005)
  Superior Price/Performance Ratio and I/O Combination are Key Factors in Decision
  
  
• Cypress Qualifies PSoC(TM) Mixed Signal Array in High-Volume Minnesota Fab 4 (Tuesday Aug. 23, 2005)
  New Source of Supply to Meet Rapidly Growing PSoC Demand
  
  
• CoreSim Delivers ASIC Replacement Based on LatticeEC FPGA (Monday Aug. 22, 2005)
  Digital Electronics Design Firm Solves ASIC Conversion Challenge with Low Cost, High Performance Lattice FPGA
  
  
• Altera uses local firm for Indian R&D (Friday Aug. 19, 2005)
  Altera Corp. may be the only FPGA company to have a wholly-owned Indian subsidiary firm, but it has no plans to set up a R & D center or outsource software development to India
  
  
• FPGAs to dominate medical semi market, says report (Thursday Aug. 18, 2005)
  Field programmable gate arrays are likely to be the fastest-growing segment over other technologies in the growing market for semiconductors in medical imaging, according to a study by Frost & Sullivan (New York).
  
  
• New Actel Low-Cost Starter Kit Demonstrates Secure In-System Programmability of ProASIC3/E FPGAs (Tuesday Aug. 16, 2005)
  Starter Kit Provides Designers With Platform to Evaluate FlashLock and 128-bit AES-Based Security Solutions of ProASIC3/E Devices
  
  
• Xilinx Ships 5 Millionth 90nm Device (Tuesday Aug. 16, 2005)
  Xilinx Ships 5 Millionth 90nm Device
  
  
• LatticeEC FPGA is Chip of Choice for Quad HDLC PCI Card (Tuesday Aug. 16, 2005)
  Manufacturer of Router, VOIP Equipment Chooses Lattice FPGA After Rigorous Selection Process
  
  
• Altera and TI Partner to Deliver Compliant, Low-Cost Programmable PCI Express Solution (Monday Aug. 08, 2005)
  The partnership addresses the need for a programmable, low-cost, fully compliant reference design for embedded systems bridging from legacy interfaces
  
  
• PROGRAMMABLE LOGIC: Compiler turns FPGAs into supercomputers (Monday Aug. 08, 2005)
  Scientists, engineers and software developers who know nothing about chip design can now compile high-performance computing applications into FPGAs, according to startup Mitrionics AB
  
  
• Altera Ships Industry's Largest, Low-Cost FPGA (Wednesday Aug. 03, 2005)
  Low-Cost Cyclone II FPGAs Deliver More Density for Less Money as Altera Continues its Commitment to On-time Delivery
  
  
• Siemens Medical And Xilinx Team To Deliver Breakthrough 3D Medical Imaging Solutions (Tuesday Aug. 02, 2005)
  Siemens redefines 3D medical imaging with next-generation products enabled by Virtex-4 SX FPGAs and Xilinx Design Services
  
  
• Xilinx Embedded PowerPC Reference Design With Treck Software Delivers Gigabit Ethernet Performance (Thursday Jul. 28, 2005)
  Treck TCP/IP Protocol Stack and Xilinx Virtex-4 FX PowerPC Core Achieve More Than 6X Throughput Advantage Over Competing FPGAs
  
  
• Talijon Engineering Chooses LatticeEC FPGA to Replace Obsolete ASIC (Thursday Jul. 28, 2005)
  Design Services Firm Cites Price, Performance, SPI Flash Support and Service as Key Factors in Decision
  
  
• ACTEL and HDL Works Announce Optimization of Graphical HDL Design Entry Environment for Actel Design Flow (Tuesday Jul. 26, 2005)
  Companies Also Announce Addition of HDL Works to Actel's EDA Alliance Program
  
  
• Actel Introduces Fusion Technology and Ushers in Era of the Programmable System Chip (Monday Jul. 18, 2005)
  Actel Fusion Technology Combines Analog Peripherals, Flash Memory and FPGA Fabric in a Monolithic Programmable System Chip
  
  
• Altera Offers Faster Speed Grade for High-Density Stratix II FPGAs (Monday Jul. 18, 2005)
  Excellent Yield and Successful Production Qualification Results in Faster Speed Grade
  
  
• Lattice MachXO devices provide new low cost alternative to CPLDs and FPGAs (Monday Jul. 18, 2005)
  Embedded Flash Plus SRAM Technology Enables Crossover Programmable Logic Devices to Expand Beyond Traditional CPLDs and FPGAs
  
  
• Interface Board Design Relies on LatticeEC FPGAs (Monday Jul. 11, 2005)
  Engineering Services Firm Impressed with Device Cost, Performance, Migration Path
  
  
• Xilinx AcceleratesVirtex-4 FPGA Performance By An Additional 26% With New Xplorer Utility (Monday Jul. 11, 2005)
  Xilinx, Inc. (NASDAQ: XLNX) today announced the immediate availability of its Xplorer utility - an easy-to-use script developed to help designers benchmark and maximize the performance advantages of the company’s Virtex-4 ™ and Spartan-3 ™ FPGAs
  
  
• Actel's Libero IDE Delivers Unmatched Value, Flexibility and Efficiency for Complex FPGA-Based Designs (Monday Jul. 11, 2005)
  New Static Timing Analysis Engine and Expanded Third-Party Support Enable Designers to Meet Timing Closure and Achieve Higher Performance
  
  
• Cypress Delivers Programmable System-on-Chip(TM) (PSoC(TM)) with Integrated Full-Speed USB (Monday Jul. 11, 2005)
  New Chip Provides Traditional PSoC Integration Benefits Plus USB and Cypress CapSense(TM) Technology for HID, UPS and other Applications
  
  
• Actel Introduces Land Grid Array Packaging Option for Radiation-Tolerant RTAX-S FPGA Family (Thursday Jul. 07, 2005)
  Low-Profile Package Provides Enhanced Performance and Flexibility for Mission-Critical Military and Aerospace Designs
  
  
• Xilinx prepares to boost FPGA activity in India (Thursday Jul. 07, 2005)
  FPGA vendor Xilinx Inc. said it plans to boost its funding efforts and long-term research in Indian technical institutes to support increased use of FPGAs in India and to develop tools and methodologies for use about four years from now
  
  
• Actel Ships Fully Qualified RTAX-S FPGAs to Meet High-Reliability Needs of Space Designs (Tuesday Jul. 05, 2005)
  Actel's Antifuse FPGAs Provide Flexible, Cost-Effective, SEU-Immune Alternative to Radiation-Hardened ASICs
  
  
• Altera, InterNiche and MorethanIP Announce Networking Reference Design for Nios II Processor (Tuesday Jun. 28, 2005)
  Performance-Optimized Design Delivers 60 Mbits of Throughput via TCP/IP Over a 100 Mbit Link
  
  
• Talijon Engineering delivers turnkey hardware solution using LatticeEC FPGA, Lattice IP Cores and ispPAC Power Manager devices (Monday Jun. 27, 2005)
  Tight Schedule Demanded Immediate Response from Lattice
  
  
• Altera Cyclone FPGAs and Nios II Embedded Processors Power World's Largest 32-bit Multiprocessor Display System (Wednesday Jun. 22, 2005)
  Barco’s OLite 510 Display Technology Uses More Than 100 Cyclone FPGAs and Nios II Embedded Processors per Square Meter
  
  
• FPGA choice has bearing on signal integrity (Monday Jun. 20, 2005)
  Signal integrity has become a critical issue in the design of high-speed systems. Inferior signal integrity leads to poor reliability, degraded performance, field failures and delayed product releases-all of which can trigger lost opportunities and revenu