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IP / SOC Products News

• Evatronix Facilitates Its JPEG 2000 Encoder Evaluation with the Online Demo Application (Tuesday Jun. 08, 2010)
  Evatronix SA, announced today the introduction of an online application that demonstrates the capabilities of the company’s JPEG 2000 Encoder IP core. This free demo system is easily accessable through the Evatronix website.
  
  
• CAST 80251 Processor IP Core Runs Legacy and New Code Up to 24x Faster (Tuesday Jun. 08, 2010)
  Electronic designers using the popular 8051 microcontroller can now apply their investment in 8051 knowledge and code to faster systems using the R80251XC IP core from CAST, Inc.
  
  
• Chips&Media adds VP8 on its new BODA9 / CODA9 (Tuesday Jun. 08, 2010)
  Chips&Media today announces that it will include VP8 in its the latest video codec IP family, BODA9™/CODA9™, high performance 1080p 60fps HD video decoder IP cores with multi-format capabilities.
  
  
• PLDA Furthers Its PCIe Industry Leadership with the Introduction of the World's First PCI Express 3.0-Based IP for ASIC and FPGA (Monday Jun. 07, 2010)
  PLDA today announced the immediate availability of XpressRich3 - the world’s first IP core for leading FPGAs and ASICs based on the forthcoming PCIe® 3.0 specification, currently under development within the PCI-SIG®. The PLDA XpressRich3 core features an innovative architecture that seamlessly allows both ASIC and FPGA implementations, an extensive list of configurable features and a broad range of user interface options to easily achieve simple to more complex design requirements.
  
  
• Sidense Introduces Ultra-Low-Power NVM Memory (Monday Jun. 07, 2010)
  Sidense today announced the introduction of the Company’s ULP (Ultra-Low Power) one-time programmable (OTP) macro family. ULP macros are based on the Company’s patented one-transistor (1T) split-channel architecture (1T-Fuse™) and require no additional masks or process steps, thus adding no extra wafer processing cost.
  
  
• Actel Delivers Free IP Cores Bundle and RTL Package Option with Standard Software Packages (Monday Jun. 07, 2010)
  Actel is making it easier to build powerful designs using the proven IP blocks in its portfolio by including free access to IP libraries in its Libero® Gold edition and RTL-source IP libraries in its Libero Platinum edition. Access to more than fifty IP cores is now included in the comprehensive software toolset.
  
  
• MoSys and Sarance Partner to Deliver Complete 40 Gigabit and 100 Gigabit Ethernet and Interlaken Solutions (Thursday Jun. 03, 2010)
  MoSys and Sarance have partnered to deliver joint PHY plus Media Access Controller (MAC) solutions supporting 40 Gigabit Ethernet, 100 Gigabit Ethernet and Interlaken specifications. The combined solution leverages MoSys' 10Gbps SerDes and Sarance's 40GE and 100GE MAC, Physical Coding Sub-layer (PCS) and Multi Lane Distribution (MLD) IP conforming to the emerging 40GE and 100GE standard using IEEE defined XLAUI (40GE) and CAUI (100GE) interfaces.
  
  
• Virage Logic Introduces New Sonic Focus(R) PC Audio Enrichment IP (Thursday Jun. 03, 2010)
  Virage Logic today announced that ASUSTeK Computer has licensed Virage Logic's new Sonic Focus PC audio enrichment IP. The entire line of Sonic Focus(R) audio software, including the new Sonic Focus PC, will ship on the new ASUS N43, N53, NX90 and N73 notebooks as part of ASUS' exclusive SonicMaster audio suite--a raft of hardware and software enhancements developed in collaboration with Bang & Olufsen ICEpower(R).
  
  
• Kilopass Announces Industry's Largest Embedded Logic Non-Volatile Memory for Leading-Edge Semiconductor Systems-on-Chip (Wednesday Jun. 02, 2010)
  Kilopass Technology unveiled a one-time programmable 4-Mb non-volatile memory IP product large enough to store the firmware and boot code that is traditionally stored in external serial-flash EEPROM chips.
  
  
• Cosmic Circuits announces silicon-proven 40nm Wireless Analog IP (Monday May. 31, 2010)
  Cosmic Circuits today announced the availability of a silicon-proven platform of mixed-signal IP cores in TSMC 40nm for wireless communications applications, resulting from its collaboration with TSMC.
  
  
• Dolphin Integration adds a Sample Rate Converter to its audio converter (Friday May. 28, 2010)
  The frequent nightmare of Audio/Video system designers is the synchronization of audio data with different streams. The recourse to one or more PLL’s not only is at risk of complex jitter issues but its solution in any case is painful. What is more such complexity prevents from foreseeing the actual impact on audio performance.
  
  
• Digital Imaging Core Now Available for Integration From DarbeeVision (Thursday May. 27, 2010)
  DarbeeVision today announced the availability of its patented Visual Presence(TM) IP core, the DV3000. The DV3000 uses innovative technology which inserts depth cues to create images that seem to pop off the screen -- enabling a visual experience where the viewer is immersed into a two-dimensional world with incredible depth and lifelike images.
  
  
• CAST Reference Design System Simplifies H.264 Video Compression Evaluation and Analysis (Tuesday May. 25, 2010)
  Electronic system design engineers who need to understand and evaluate H.264 video encoding now have a quick, cost-effective, ready-to-run tool for doing just that. The H.264 Video Encoding Reference Design System from CAST, Inc. combines multiple hardware functions and essential software in a pre-integrated, well-documented package. The System is available now, running in either Altera or XIlinx FPGAs on commercial prototyping boards.
  
  
• SMIC and Virage Logic Expand Partnership to Offer Virage Logic's IP on SMIC's 65nm LL Process (Monday May. 24, 2010)
  Virage Logic and SMIC today announced the expansion of their longstanding partnership to include the 65-nm low-leakage (LL) process technology. Under the terms of the agreement, System-on-Chip (SoC) designers will have access to Virage Logic's SiWare Memory compilers, SiWare Logic libraries, SiPro MIPI and Intelli DDR IP on SMIC's 65nm LL process.
  
  
• Evatronix Introduces an Ultra-fast Intel 80C251 Compatible Microcontroller IP Core (Monday May. 24, 2010)
  Evatronix today announced the R80251XC – the high performance 32-bit Intel 80C251 compatible microcontroller. It is the ultimate 8051 compatible IP core, with performance results that exceed these of the original Intel 8051 chip by more than 24 times, which translates to over 3 times better result than the Intel 80C251 at the same clock frequency.
  
  
• Innopower Technology Corp. Announces the Availability of USB 3.0 Physical Layer (PHY) IP Which Has Passed USB-IF SuperSpeed Certification, through Customers' Solutions (Monday May. 24, 2010)
  Innopower Technology announced today the availability of the USB 3.0 PHY IP from Faraday Technology, which has successfully passed USB-IF (USB Implementers Forum) SuperSpeed certification and obtained the compliance logo through the customer products for both host and device ends.
  
  
• Videantis Announces Support for WebM Project and VP8 Codec (Friday May. 21, 2010)
  videantis today announced that the WebM project and the open source VP8 video codec released by Google, Inc., will be supported on the videantis v-MPx programmable processor platform.
  
  
• IPextreme to Provide ColdFire IP Cores to Tabula Customers as Standard 32-Bit Processor for Tabula ABAX 3PLDs (Thursday May. 20, 2010)
  IPextreme and Tabula today announced Tabula's selection of the ColdFire(R) embedded controller as the 32-bit processor architecture of choice for Tabula ABAX(TM) 3PLDs. Under the agreement, Tabula's customers will have access to Freescale(R) ColdFire processor cores and other valuable IP cores at prices competitive with processor platforms from leading FPGA suppliers.
  
  
• Assisting the Customer to Get the Certification of USB 3.0 Host Controller, Faraday Sets A Great Milestone for Its and USB 3.0's Market Expansion in the Industry (Thursday May. 20, 2010)
  Faraday Technology today announced that the USB 3.0 host controller of its customer, Fresco Logic, has passed USB-IF certification and obtained the xHCI controller logo. This controller, developed based on Faraday's PHY, is the first certified USB 3.0 host controller in Taiwan and one of the only two in the world.
  
  
• SMSC Qualifies Kilopass Non-Volatile Memory for Rigorous TrueAuto Process (Wednesday May. 19, 2010)
  Kilopass and SMSC today announced that Kilopass’ XPM™ NVM has passed SMSC’s TrueAuto automotive quality process, and will be embedded in many of SMSC’s TrueAuto ICs.
  
  
• Analogix announces availability of DisplayPort 1.2 HBR2 5.4Gbps products (Wednesday May. 19, 2010)
  Analogix Semiconductor launched the first DP Transmitter (Tx) and Receiver (Rx) which support the VESA DisplayPort Standard version 1.2 High Bit Rate 2 (HBR2) mode. Compared with DisplayPort 1.1a, the VESA DisplayPort version 1.2 supports higher bandwidth, greater color depths, improved EMI performance with smaller process technologies and lower cost.
  
  
• MoSys and PLDA Partner to Deliver Complete PCI Express 2.0 and 3.0 IP Solutions (Tuesday May. 18, 2010)
  MoSys and PLDA have partnered to deliver complete PCI Express 2.0 and 3.0 PHY and controller IP solutions. The first integrated offering will combine MoSys' PCI Express 2.0 PHY with PLDA's XpressRich2 controller. The companies are also working together to provide an integrated PCI Express 3.0 solution
  
  
• Alizem releases new COTS Motor Control IP product for Pump and Fan applications (Tuesday May. 18, 2010)
  Alizem announces the release of its commercial-off-the-shelf (COTS) Motor Control IP product targeted for Pump and Fan based applications.
  
  
• Dolphin Integration complements their portfolio of ROM with a shrinked variant of Cassiopeia for the 152 nm process (Monday May. 17, 2010)
  Dolphin Integration’s offering of embedded ROMs has been steadily enriched for more than 20 years with generators from 500 nm down to 65 nm and soon 40 nm. The Ragtime family of metal programmable ROM is enriched with the release of generators of the dROMet Cassiopeia architecture for both the LP and G processes at TSMC 152 nm.
  
  
• Ridgetop Group Announces Solution Developed for Intermittency Detection in Electronic Components (Monday May. 17, 2010)
  Ridgetop Group announces a solution for detection of intermittencies on programmable processors. SJ BIST™ (Solder Joint Built-In Self-Test™) is a Verilog-instantiated soft-core product that can easily be integrated into Xilinx® or Altera field programmable gate arrays (FPGAs).
  
  
• Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65 Nanometer LL Process Technology (Thursday May. 13, 2010)
  Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design and manufacturing and Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI and SEHK: 0981.HK), one of the leading semiconductor foundries in the world, today announced the immediate availability of Synopsys' silicon-proven and USB logo-certified DesignWare(R) USB 2.0 nanoPHY intellectual property (IP) for SMIC's 65 nanometer (nm) low-leakage (LL) process technology.
  
  
• Actel's New Core1553 Development Kit Gives Access to MIL-STD-1553B Bus Evaluation System Based on Fusion Mixed Signal FPGAs (Wednesday May. 12, 2010)
  Actel today announced the new Core1553 Development Kit, providing customers with a self-contained benchtop 1553 bus development system. This new up-to-date development kit provides Actel's military and aerospace customers with an easy to use kit enabling development and testing of MIL-STD-1553B development using Actel's flight-heritage proven Core1553BRM IP core.
  
  
• CAST Offers the First 12-bit JPEG Extended Sequential, DICOM-Compatible IP Core (Wednesday May. 12, 2010)
  CAST now offers the only encoder core that supports both the Baseline (8-bit) and Extended Sequential (12-bit) modes of the JPEG image compression standard.
  
  
• Actel Continues to Ease Embedded Design with Extensive Library of IP (Tuesday May. 11, 2010)
  Actel today announced that embedded designers can now take advantage of a broad portfolio of Actel IP cores available for SmartFusion™ intelligent mixed signal FPGAs. SmartFusion mixed signal FPGAs are the only device that combines an FPGA, ARM® Cortex™-M3 processor and programmable analog on a single chip.
  
  
• VeriSilicon Expands SoC Platform with On2 Technologies Finland's Silicon Proven Video Solutions (Monday May. 10, 2010)
  VeriSilicon and On2 Finland today announced a wide-ranging partnership that adds the multi-format video encode/decode solutions from On2 Finland to VeriSilicon's expanding, system level star IP portfolio. The agreement gives VeriSilicon access to On2 Finland’s silicon proven IP, with support for a variety of video formats such as Real Video (RV), Divx, VP6, VP7, VP8 and AVS, for customer SoC designs targeting mobile and home entertainment consumer applications with varied market requirements.