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IP / SOC Products News

• Altera Releases CPRI v4.1 IP Core for Wireless Basestation and Remote Radio Head Design (Monday Aug. 03, 2009)
  Supporting channel speeds up to 6.144 Gbps, the CPRI v4.1 IP core supports the LTE and WiMAX standards and offers legacy support for WCDMA, CDMA and other air-interface standards in a single system.
  
  
• Crack Semiconductor Introduces The CS1024-RSA Light-Weight RSA Offload Processor (Monday Aug. 03, 2009)
  Crack Semiconductor introduces the CS1024-RSA, an RSA-only variant of its CS1024 PKA Processor with the SIMPLR(tm) integer state aware data path and "on-the-fly" reconfigurable ALU controller for a very high performance to gate area ratio.
  
  
• HDL Design House announces Serial Rapid IO soft IP core (HIP 3300) (Friday Jul. 31, 2009)
  HDL Design House has announced Serial RapidIO soft IP core (HIP 3300) compliant with RapidIO specification version 2.0.1 . HIP 3300 Serial RapidIO endpoint soft IP core is based on a generic, highly modular architecture from which a variety of solutions can be easily created to effectively and efficiently address customers’ specific requirements.
  
  
• Arasan Chip Systems First to Announce e.MMC 4.4 Card Controller IP Core (Wednesday Jul. 29, 2009)
  Arasan announced the availability of the Embedded MultiMedia 4.4 Card Controller IP compliant with the recently ratified JEDEC e·MMC 4.4 standard. Arasan’s e·MMC 4.4 Card Controller enables memory card designers to support the higher bandwidth and new security, card partition features offered by e·MMC 4.4.
  
  
• Virage Logic Introduces Volume Production-Proven SiPro PCI Express PHY IP (Tuesday Jul. 28, 2009)
  Virage Logic today announced its new offering, a silicon and volume production-proven 40-nanometer (nm) G PCI Express Gen1/Gen2 Physical Layer (PHY). The SiPro™ PCI Express PHY product line represents the first offering in Virage Logic’s advanced interface IP SiPro product portfolio that is a result of its collaboration with AMD announced in January 2009.
  
  
• Virage Logic Extends IP Technology Leadership to the 32/28nm Process (Tuesday Jul. 28, 2009)
  Virage Logic today announced it has extended its advanced IP technology leadership to the 32/28-nanometer process node with the tape out of a product test chip with multiple IPs optimized for a high performance application for an early adopter customer.
  
  
• Dolphin Integration launches moDAC95-LB combining smallest silicon area and optimized Bill-of-Material (Monday Jul. 27, 2009)
  In the move to approach systematically the key segments of high-resolution audio converters, Dolphin Integration launches moDAC95-LB - which stands for Low Bill-of-material - a Digital Audio Converter targeting "nomad consumer devices" with a SNR as high as 95 dB.
  
  
• ARM Announces Ultra Low-Power Physical IP Technology to Drive Next-Generation MCU Devices (Monday Jul. 27, 2009)
  The ARM® 0.18µm ultra low power libraries (uLL), coupled with the inherent power management advantages of the ARM Cortex™ processor family and the TSMC 0.18µm embedded flash uLL/HDR “high data retention” process provides SoC designers with additional reduction in power leakage up to 10x compared to 0.18um G implementations.
  
  
• Evatronix Releases JPEG 2000 Image Compression Encoder Optimized for FPGA Designs (Monday Jul. 27, 2009)
  Evatronix SA, announced today the availability of the JPEG 2000 Encoder IP core. The encoder has been optimized for FPGA designs and takes a minimum number of slices while providing full compatibility with ISO/IEC 15444-1 standard that defines the JPEG 2000 format.
  
  
• Kilopass Lowers Manufacturing Cost With ROM Conversion Option (Monday Jul. 27, 2009)
  Kilopass Technology announced today that it is providing a read only memory (ROM) conversion option for its One-Time Programmable Memory (OTP) product lines. ROM-it! will eliminate programming test cost for OTP.
  
  
• Nangate Releases a New Version of the 45nm Open Cell Library (Thursday Jul. 23, 2009)
  Nangate has just released the fourth version of its open source 45nm standard-cell library. Along with the library, Nangate releases a freely distributed tool for creating HTML databooks from Liberty files, the Nangate Liberty Viewer™.
  
  
• Evatronix And Soft-Mixed Signal Announce USB 2.0 Total Solution (Thursday Jul. 23, 2009)
  Evatronix SA and Soft Mixed Signal announced today the availability of the complete USB 2.0 solution that integrates USB 2.0 Controller IP from Evatronix and the USB 2.0 PHY IP from Soft Mixed Signal.
  
  
• MOSAID Now Sampling HLNAND Flash Memory Semiconductor Chip and Module (Wednesday Jul. 22, 2009)
  MOSAID today announced that HLNAND™ (HyperLink NAND), the Company's breakthrough Flash memory architecture and interface, is now available for sampling. The devices are a 64Gb MLC (Multi Level Cell) HLNAND MCP (Multi-Chip Package), and a 64GB HLDIMM (HyperLink Dual In-Line Memory Module).
  
  
• Silicon Image Introduces New IP Core Product Family Supporting HDMI(R) 1.4 Features (Wednesday Jul. 22, 2009)
  Silicon Image today announced that it is expanding its market-leading family of HDMI(R) semiconductor intellectual property (IP) cores to include transmitter and receiver IP cores that incorporate features of the recently announced HDMI Specification Version 1.4.
  
  
• Virage Logic Offers Broadest Portfolio of Embedded Non-Volatile Memory (NVM) Solutions at TSMC (Tuesday Jul. 21, 2009)
  Virage Logic today announced it offers the broadest portfolio of embedded non-volatile memory (NVM) at TSMC, with fully qualified IP solutions ranging from 250nm down to 65nm. With a comprehensive selection of multi-time programmable (MTP) and few-time programmable (FTP) NVM IP, the AEON(R) product family addresses the needs of wireless, automotive, analog, power management and security applications.
  
  
• Chips&Media Delivers the Latest Full HD Codec IP Core Coda8550 (Tuesday Jul. 21, 2009)
  Chips&Media today announced that its new High definition multi-standard video IP core Coda8550. Coda8550, the first IP of the next generation of Chips&Media’s advanced Coda8 series, delivers full HD(1080p) encoding capability at 30fps under 200MHz clock frequency.
  
  
• Synopsys' New DesignWare IP Slashes Power in Datapath Circuits (Monday Jul. 20, 2009)
  Synopsys today announced the DesignWare® minPower Components, a new IP product that is an integral part of the Synopsys Eclypse™ Low Power Solution. By using the DesignWare minPower Components, leading wireless, networking and DSP companies achieved power reduction of up to 48 percent in datapath logic.
  
  
• Synopsys Accelerates Development of System-On-Chip Designs With Complete IP Solution for PCI Express 3.0 (Wednesday Jul. 15, 2009)
  Synopsys today announced its complete DesignWare® IP solution for PCI Express® (PCIe®) 3.0 consisting of digital controllers, PHY and verification IP. Synopsys' DesignWare IP enables easy integration of the 8.0 GT/s PCI Express 3.0 interface into system-on-chips (SoCs) for high-performance enterprise computing applications.
  
  
• Syntill8 to offer Mentor Graphics' M8051 Microcontroller IP and Support Services (Wednesday Jul. 15, 2009)
  Syntill8 today announced a reseller agreement with Mentor Graphics. Under the agreement Syntill8 will sell and support Mentor’s industry proven 8-bit microcontroller Intellectual Property (IP) cores. Syntill8’s CTO is the original designer of the majority of Mentor’s M8051 IP products.
  
  
• CAST Releases H.264 IP Core for Highest Quality HD Video Compression (Tuesday Jul. 14, 2009)
  CAST today announced the immediate availability of a new H.264 encoder core that delivers some of the best looking compressed video available. The core fully supports the Baseline Profile, Level 4.1, of the H.264 specification (MPEG-4 Part 10, also known as MPEG-4 AVC, Advanced Video Coding).
  
  
• Faraday Launches Its Low-leakage Memory with Up to 90% Leakage-reduction (Tuesday Jul. 14, 2009)
  Faraday today announced the availability of low leakage memory at UMC 90nm process, which provides up to 90% leakage reduction with no area penalty. Faraday's low leakage memory has been silicon proven via complete function verifications, targeting fabless design houses, foundries, system vendors and IDMs.
  
  
• Sital releases a PCI Interface IP core for the Aerospace market sector (Thursday Jul. 09, 2009)
  Sital releases a PCI Interface IP core for the Aerospace market sector. This PCI IP core was developed in order to overcome problems related to existing IP cores, specifically in the aerospace industry, where high reliability, wide temperature range and easy integration are key.
  
  
• Sarnoff Europe Becomes Sofics, Announces New System-Level ESD Solutions for High-Voltage ICs (Tuesday Jul. 07, 2009)
  Sarnoff Europe today announced that it is changing its corporate name to Sofics, and is introducing a new line of design solutions for high-voltage ICs that provide on-chip protection against damage from system-level electrostatic discharge (ESD).
  
  
• Dolphin Integration launches the BTF upgrade of its standard cell offering SESAME for 130 nm (Monday Jul. 06, 2009)
  Dolphin Integration continues their steady enhancement of the proprietary RCSL (Reduced Cell Stem Library) with the High Density stem HD-BTF for TSMC 130 nm G processes. Highly Dense and endowed with “Back-Tracking Freedom”, HD-BTF incorporates the latest architectural innovations from Dolphin Integration replacing classical flip-flops with their “spinner cell”.
  
  
• TSMC Unveils First Commercial 65-Nanometer Multi-Time Programmable Non-Volatile Memory Technology (Thursday Jul. 02, 2009)
  TSMC today announced the foundry segment’s first functional 65-nanometer (nm) multi-time programmable (MTP) non-volatile memory (NVM) process technology. The technology incorporates process-qualified MTP IP blocks jointly developed with Virage Logic.
  
  
• Cosmic Circuits tapes out 40nm Mixed Signal Test Chip (Wednesday Jul. 01, 2009)
  Cosmic Circuits announced the tape out of its TSMC 40nm Mixed Signal test chip. The test chip consists of several data converters and power regulators for Wireless Communications and Portable consumer applications.
  
  
• FFT Library from OptNgn Validated for use in Mentor Graphics' Precision FPGA Synthesis (Tuesday Jun. 30, 2009)
  OptNgn today announced that it has validated its newly released FFT WFTA Kernels Library of streaming IP cores for use with Mentor Graphics Precision® RTL Synthesis. These Winograd Fourier Transform (WFTA) kernels, along with their derivative 1D and 2D libraries, represent a vendor independent and high throughput way to use the cache-free FFT power available in FPGA coprocessors
  
  
• Dolphin Integration's Audio converter Helium lightens both Power consumption and Bill-of-Material (Tuesday Jun. 30, 2009)
  Low power consumption has become a hot selling argument for SoCs targeting nomad audio applications. Class D amplifiers have demonstrated their superior power efficiency for driving loud-speakers.
  
  
• Rambus Demonstrates Superior Power Efficiency of World's Fastest Memory (Tuesday Jun. 23, 2009)
  Rambus today showcased a silicon demonstration of a complete XDR™ memory system running at data rates up to 7.2Gbps with superior power efficiency.
  
  
• Sonics Combines DRAM Scheduler with Synopsys Protocol Controller For Integrated High-Performance Memory Subsystem (Tuesday Jun. 23, 2009)
  Sonics has announced the MemMax® DRAM System, a pre-configured, verified and silicon-proven IP block that can be integrated into a variety of SoCs quickly and easily. The IP block is a combination of Sonics’ advanced memory scheduler and Synopsys’ DesignWare® DDR Protocol Controller IP.